Clocking And Clock Selection - XMOS xCORE-200 Multi-channel Audio board Design Manual

USB Audio Design Guide
Endpoint buffer
Decoupler
Audio Driver
Device Firmware Upgrade (DFU)
PDM Microphone integration
The software layout is the identical to the dual tile L-Series Multi-channel Reference
Design and therefore the diagram Figure
the code running on the xCORE-200 device.
As with the L/U-Series, each unit runs in a single core concurrently with the others
units. The lines show the communication between each functional unit.
The provided application also includes an example of basic microphone data
processing.

6.7.1 Clocking and Clock Selection

The board includes an external fractional-N clock multiplier (Cirrus Logic CS2100)
for audio clock generation.
This allows the audio master clock to be generated from an reference clock provided
by the xCORE, optionally derived from some external source e.g. an incoming
digital steam.
This functionality is primarily included on the board to allow for Ethernet AVB,
where syncing to an external clock is required. In the USB audio design the IC is
simply used for static master clock generation.
The system wide audio master-clock is connected to the AUX output of the CS2100
part. By default, without configuration, the CS2100 part outputs the 24.576MHz
REF input to this output.
The clock multiply ratio is programmed into the CS2100 via the I2C bus.
By default a core is used to drive a fixed reference to the CS2100 part using a timer
and port I/O. Since this I/O is located on a 4-bit port it cannot be directly output
from a clock-block (which would save a core).
In order to reduce core count the following could be done:
Move the I/O to a 1-bit port and drive the clock directly from a clock-block
Combine this (computationally simple) task into another task
Use a clocking methodology that does not require this REF signal as previously
explained, it is unlikely the clocking methodology would be employed in a
production environment if locking to an external clock is not required.
XM0088546.1
37 shows the software arrangement of
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