T T L I n t e r f a c e
+5VDC
1N916
CONTROLLER
OR EQUIV
OUTPUT
TTL INTERFACE
INTERFACE SHOWN CONNECTED TO
THE ENABLE INPUT, MAY BE USED FOR
THE OTHER LOGIC INPUTS
Figure 1.5.3: TTL Interface
O p e n C o l l e c t o r I n t e r f a c e
+VDC
R
¼ W
CONTROLLER
OUTPUT
OPEN COLLECTOR
INTERFACE
INTERFACE SHOWN CONNECTED TO
THE ENABLE INPUT, MAY BE USED FOR
THE OTHER LOGIC INPUTS
Figure 1.5.4: Open Collector Interface
430Ω
.
PIN 1
ENABLE
LOGIC
GROUND
H
/F
STEP
CLOCK
CW
/CCW
CURRENT
ADJUST
+VDC
R
5
430
10
1200
12
1500
15
2000
24
3000
PIN 1
ENABLE
LOGIC
GROUND
H
/F
STEP
CLOCK
CW
/CCW
CURRENT
ADJUST
B Y J A
D R A W N
PHASE A
PHASE
A
PHASE B
PHASE
B
V+
GROUND
D R A W N
B Y J A
PHASE A
PHASE
A
PHASE B
PHASE
B
V+
GROUND
29
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