Intel 82541PI Design Manual page 7

4.8 Light Emitting Diodes for Designs Based on 82541PI(ER) ....................................40
4.9 Schematic for EEPROM Footprints and LCI Connection.......................................40
4.10 Termination of Unused
Differential Signals on Gigabit Magnetics for 10/100 LOM Design ........................41
4.10.1 Option 1: Board Level Stuffing ....................................................................41
4.10.2 Option 2: Rework of Gigabit Magnetics.......................................................43
4.10.3 Option 3: Integrated Magnetics Module for 10/100 Mbps and Gigabit ........44
4.11 Physical Layer Conformance Testing ....................................................................45
4.12 Troubleshooting Common Physical Layout Issues ................................................46
5.0 Pin Number to Signal Mapping with Population Options .................. 47
6.0 Self-Review Checklist for Combined Footprint LOM.......................... 55
7.0 Reference Schematics........................................................................... 57
A Measuring LAN Reference
Frequency Using a Frequency Counter............................................... 69
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Application Note (AP-468)
82541PI(ER) and 82562GZ(GX) Dual Footprint LOM Design Guide
Crystal Circuit ................................................................................................ 9
RBIAS10 and RBIAS100 Circuits................................................................12
82541PI(ER) LAN Disable Circuitry ............................................................16
General Placement Distances.....................................................................26
Critical Dimensions for
Component Placement (Discrete Magnetics Solution)................................27
Critical Dimensions for 82562GZ(GX) and
82541PI(ER) Component Placement with Integrated Magnetics Module ...29
Corner Trace Routing..................................................................................30
Ground Plane Separation............................................................................34
Ideal Ground Split Implementation (for Integrated RJ-45 without USB)......35
Termination Plane Example for
82562GZ/GX PLC Device and Discrete Magnetics.....................................36
Decoupled LAN Power Trace (Power Supplied by Trace) ..........................37
Using a Moat to Reduce Noise From Adjacent Traces and Power Fills......38
Termination Resistors Placement (Integrated Magnetics Solution) ............39
Common EEPROM Footprint for Both 82541PI(ER) and 82562GZ(GX) ....40
Independent EEPROM Footprints for Individual LAN Controllers ...............41
Typical Magnetics for Gigabit LAN
Controller with Optional Resistors Footprint................................................42
Replacement of Magnetics for
10/100 LAN Controller with Optional Resistors Populated..........................43
Rework of Gigabit Magnetics with Shorted
Pair Three and Four on Differential Traces for 10/100 LOM Design ...........44
Indirect Probing Setup.................................................................................70
Direct Probing Method.................................................................................73
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