Analog Devices AD9874 Manual page 9

144 109
1 108
XILINX
XC2S100
SPARTAN II
TQFP144
73
36
37 72
1
3_3V VCCO-B0
2
TCK TCK VCCO-B4
SYNCB 3
B0IO-7 VCCO-B3
4
B0IO-6 PROGRAM
FS
5
B0IO-VREF2 B3IO-INT
DOUTB
6
B0IO-5
DOUTA
7
B0IO-4
8
GND16
B3IO-VREF1
9
VCCINT8
10
B0IO-3
DOUT
11
B0IO-2
12
B0IO-VREF1
13
B0IO-1
14
VCCINT7
CLKOUT
15
GCK3 B3IO-VREF2
16
VCCO-B1B0
17
GND15
PC_5V
18
GCK2 VCCINT5
PE
19
B1IO-7 B3IO-TRDY
PD
20
B1IO-6 VCCO-B3B2
21
B1IO-VREF2
PC
22
B1IO-5
B2IO-IRDY
23
B1IO-4
24
VCCINT6
2_50V
25
GND14
B2IO-VREF1
26
B1IO-3
27
B1IO-2
28
B1IO-VREF1
29
B1IO-1
30
B1IO-WRITE
31
B1IO-CS
32
TDI B2IO-VREF2
TDI
33
GND13
34
TDO B2IO-DIN-D0
TDO
35
VCCO-B1 D2IO-DOUT-BUSY
36
VCCO-B2
U3
XC2S100
REV. 0
R54
10k
3_3V
SW1
2 4
1 3
RESET
C97
0.1 F
DGND; 5
72
DONE DONE
71 DAT0
3_3V
70 DAT1
69 DAT2
68 DAT3
INIT
67 DAT4
B3IO-D7
66 DAT5
B3IO-1
65 DAT6
64
B3IO-2
63
B3IO-3 2_50V
62 DAT7
B3IO-D6
61 DAT8
GND10
60 PD_IN_5V DAT9
B3IO-D5
59 PE_5V DAT10
B3IO-4
58 PD_OUT_3V DAT11
57
B3IO-D4
56
B3IO-5
55
2_50V
54
53
52 DAT12
GND11
51 DAT13
50 DAT14
B2IO-1
49 DAT15
B2IO-D3
48
47
B2IO-2
46 _WEN
B2IO-D2
45 WR_CLK
GND12
44 _MRS
B2IO-D1
43
B2IO-3
42 _MRSCTR
B2IO-4
41 _REQ
40 _RESET
B2IO-5
39
DIN M2
38
37
CCLK CCLK 3_3V
J7
1
3_3V VCC
2
GND
3
CCLK
TCK TCK
4
TDO TDO
5
DONE
TDI TDI
6
TMS
TMS
JTAGCONN
73 144
GND9 VCCO-B7
74 143
B4IO-10 GND1
75 142
B4IO-9 TMS
76 141
B4IO-8 B7IO-1
77 140
B4IO-VREF2 B7IO-2
78 139
B4IO-7 B7IO-VREF1
79 138
B4IO-6 B7IO-3
80 137
B4IO-5 B7IO-4
81 136
GND8 B7IO-5
82 135
VCCINT4 GND2
83 134
B4IO-4 B7IO-6
84 133
B4IO-3 B7IO-7
85 132
B4IO-VREF1 B7IO-VREF2
86 131
B4IO-2 B7IO-8
87 130
B4IO-1 B7IO-9
88 129
GCK0 B7IO-IRDY
89 128
GND7 GND3
90 127
VCCO-B5B4 VCCO-B7B6
91 126
GCK1 B6IO-TRDY
92 125
VCCINT3 VCCINT1
93 124
B5IO-7 B6IO-1
94 123
B5IO-VREF2 B6IO-2
95 122
B5IO-6 B6IO-VREF1
96 121
B5IO-5 B6IO-3
97 120
VCCINT2 B6IO-4
98 119
GND6 GND4
99 118
B5IO-4 B6IO-5
100 117
B5IO-3 B6IO-6
101 116
B5IO-2 B6IO-7
102 115
B5IO-VREF1 B6IO-VREF2
103 114
B5IO-1 B6IO-8
104 113
STATUS B6IO-9
105 112
PWDN B6IO-10
106 111
M2 M1
107 110
VCCO-B5 GND5
108 109
VCCO-B6 M0
U3
XC2S100
Figure 6c. FPGA
-9-
EVAL-AD9874EB
U4
XC17S100XL
1 8
DIN
DATA
VCC2
2 7
CLK
VCC1
3 6
INIT
OE/RESET
4 5
CE
GND
C24
D2
330
GRN
3_3V
TMS
J4
6
CLKOUT_BUFF
5
FS_BUFF
C55
4
0.1 F
DOUT_BUFF
3
DOUTA_BUFF
2
U3 DECOUPLING
DOUTB_BUFF
1
SPARE
TESTMON
C61
0.1 F
U3 DECOUPLING
2_50V
C50
0.1 F
U3 DECOUPLING
_REN
_EF
_PAE C45
0.1 F
_HF
_PAF
U3 DECOUPLING
_FF
M2
R45 R40
10k 0
3_3V
3_3V
C54
0.1 F
2_50V
C85 C84 C68
0.1 F 0.1 F 0.1 F
2_50V
C59 C58 C56
0.1 F 0.1 F 0.1 F
3_3V
C51 C52 C53
0.1 F 0.1 F 0.1 F
3_3
C47 C48 C49
0.1 F 0.1 F 0.1 F