ON Semiconductor NCP1239FDR2G Reference Manual page 35

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One clearly sees that the GTS signal does not react to the fugitive low FB Pin condition during startup
REF5V
Skip
R1
Adjust
R2
Suppose our Flyback controller is built with a transformer
primary inductance of 250 mH. To pass 120 W, we assume
that a peak current of 4.2 A was needed. Due to these
numbers, we can easily now when the GTS signal will be
asserted:
Lp, primary inductance = 250 mH
h = 85%
fsw, switching frequency = 65 kHz
2 @ P out
Ip +
h @ Lp @ fsw
Ip skip = 30% of Ip max = 1.26 A
100k
7
+
0.43V
GTS
pin1
(*) the 100 ms delay is programmed by the Pin 6 capacitor
Internal Go−To−Standby signal elaboration
+ 4.2 A
http://onsemi.com
NCP1239
Figure 58.
FB < V
=> Skip high
pin7
+
FB
COMP1
15r
25r
COMP2
+
FB > 1.7 * V
=> Stby_detect RESET
pin7
100 ms timer (*)
(SS and timer block)
Figure 59.
The theoretical region at which the SMPS will enter
standby is: 1/2 * Lp * Ip
can vary depending on the line level since the propagation
delay becomes a sensitive parameter, and on the efficiency
that is difficult to precisely predict in light load conditions.
The peak current at which the SMPS will leave standby is
48% of the peak current which means that a power of 28 W
is necessary to re−trigger the PFC.
35
Skip
Stby_detect
S
Q
Q
R
2
* fsw * h  11 W. This number

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