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regulation
Vcc
PWM
16.4V
11.2V
6.9V
Timer
100ms*
0.9V
flag
7.5ms*
SS
PFC
Vcc
*This time is programmed by the Pin 6 capacitor. C
− Soft−Start Time (T
− Jittering Period (T
− Fault Detection Delay (T
More generally, the times approximately depend on C
− T
= 7.5 ms * C
ss
− T
=10 ms * C
jittering
− T
=100 ms * C
delay
NCP1239
Short−circuit
Stby stby is left
Nom
Pout
100ms*
100ms*
Standby
is confirmed
):7.5 ms
ss
): 10 ms
jittering
): 100 ms
delay
/ 390 nF
pin6
/ 390 nF
pin6
/ 390 nF
pin6
Figure 38.
http://onsemi.com
One Vcc cycle is skipped to
lower the burst mode duty
cycle to typically 5% in
fault conditions.
= 390 nF nearly sets the following intervals:
pin6
as follows:
pin6
20
Short−circuit
100ms*
If the fault had disappeared
the SMPS would recover
normal operation
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