Camera Functional Description; Overview (All Models Except Aca2500-14) - Basler ace acA640-90gm User Manual

Camera Functional Description

4 Camera Functional
Description
This chapter provides an overview of the camera's functionality from a system perspective. The
overview will aid your understanding when you read the more detailed information included in the
later chapters of the user's manual.
4.1 Overview
(All Models Except acA2500-14)
Each camera provides features such as a full frame shutter and electronic exposure time control.
Exposure start and exposure time can be controlled by parameters transmitted to the camera via
the Basler pylon API and the GigE interface. There are also parameters available to set the camera
for single frame acquisition or continuous frame acquisition.
Exposure start can also be controlled via an externally generated "frame start trigger" (ExFSTrig)
signal applied to the camera's input line. The ExFSTrig signal facilitates periodic or non-periodic
frame acquisition start. Modes are available that allow the length of exposure time to be directly
controlled by the ExFSTrig signal or to be set for a pre-programmed period of time.
Accumulated charges are read out of the sensor when exposure ends. At readout, accumulated
charges are transported from the sensor's light-sensitive elements (pixels) to the vertical shift
registers (see Figure 15 on page 30 for cameras with a progressive scan sensor and Figure 16 on
page 30 for cameras with an interlaced scan sensor). The charges from the bottom line of pixels in
the array are then moved into a horizontal shift register. Next, the charges are shifted out of the
horizontal register. As the charges move out of the horizontal shift register, they are converted to
voltages proportional to the size of each charge. Each voltage is then amplified by a Variable Gain
Control (VGC) and digitized by an Analog-to-Digital converter (ADC). After each voltage has been
amplified and digitized, it passes through an FPGA and into an image buffer. All shifting is clocked
according to the camera's internal data rate. Shifting continues in a linewise fashion until all image
data has been read out of the sensor.
The pixel data leaves the image buffer and passes back through the FPGA to an Ethernet controller
where it is assembled into data packets. The packets are then transmitted via an Ethernet network
to a network adapter in the host PC. The Ethernet controller also handles transmission and receipt
of control data such as changes to the camera's parameters.
The image buffer between the sensor and the Ethernet controller allows data to be read out of the
sensor at a rate that is independent of the data transmission rate between the camera and the host
computer. This ensures that the data transmission rate has no influence on image quality.
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