Adc0Lth: Adc0 Less-Than High Byte; Adc0Ltl: Adc0 Less-Than Low Byte; Adc0Mx: Adc0 Multiplexer Selection - Silicon Laboratories EFM8 Series Reference Manual

12.4.11 ADC0LTH: ADC0 Less-Than High Byte

Bit 7
Name
Access
Reset
SFR Page = 0x0, 0x10; SFR Address: 0xC6
Bit Name
7:0 ADC0LTH
Most significant byte of the 16-bit less-than window compare register.

12.4.12 ADC0LTL: ADC0 Less-Than Low Byte

Bit 7
Name
Access
Reset
SFR Page = 0x0, 0x10; SFR Address: 0xC5
Bit Name
7:0 ADC0LTL
Least significant byte of the 16-bit less-than window compare register.
In 8-bit mode, this register should be set to 0x00.

12.4.13 ADC0MX: ADC0 Multiplexer Selection

Bit 7
Name
Access
Reset
SFR Page = 0x0, 0x10; SFR Address: 0xBB
Bit Name
7:5 Reserved
4:0 ADC0MX
Selects the positive input channel for ADC0. For reserved bit combinations, no input is selected. See the table in the ADC
chapter for more information on the pin associated with each input for each package.
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6 5
Reset Access
0x00 RW
6 5
Reset Access
0x00 RW
6 5
Reserved
R
0x0
Reset Access
Must write reset value.
0x1F RW
4 3
ADC0LTH
RW
0x00
Description
Less-Than High Byte.
4 3
ADC0LTL
RW
0x00
Description
Less-Than Low Byte.
4 3
Description
AMUX0 Positive Input Selection.
EFM8UB3 Reference Manual
Analog-to-Digital Converter (ADC0)
2 1
2 1
2 1
ADC0MX
RW
0x1F
0
0
0
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