u-blox LARA-R2 series System Integration Manual page 42

AT+UPSV HW flow control
3 Enabled (AT&K3)
3 Enabled (AT&K3)
3 Enabled (AT&K3)
3 Enabled (AT&K3)
3 Disabled (AT&K0)
3 Disabled (AT&K0)
Table 11: UART and power-saving summary
AT+UPSV=0: power saving disabled, fixed active-mode
The module does not enter low power idle-mode and the UART interface is enabled (data can be sent and
received): the CTS line is always held in the ON state after UART initialization. This is the default configuration.
AT+UPSV=1: power saving enabled, cyclic idle/active-mode
When the AT+UPSV=1 command is issued by the DTE, the UART will be normally disabled, and then periodically
or upon necessity enabled as following:

During the periodic UART wake up to receive or send data, also according to the module wake up for the
paging reception (see section 1.5.1.4) or other activities

If the module needs to transmit some data (e.g. URC), the UART is temporarily enabled to send data

If the DTE send data with HW flow control disabled, the first character sent causes the UART and module
wake-up after ~20 ms: recognition of subsequent characters is guaranteed only after the complete wake-up
(see the following subsection "wake up via data reception")
The module automatically enters the low power idle-mode whenever possible but it wakes up to active-mode
according to the UART periodic wake up so that the module cyclically enters the low power idle-mode and the
active-mode. Additionally, the module wakes up to active-mode according to any required activity related to the
network (e.g. for the periodic paging reception described in section 1.5.1.4, or for any other required RF Tx / Rx)
or any other required activity related to module functions / interfaces (including the UART itself).
The time period of the UART enable/disable cycle is configured differently when the module is registered with a
2G network compared to when the module is registered with an LTE network:

2G: UART is enabled synchronously with some paging receptions: UART is enabled concurrently to a paging
reception, and then, as data has not been received or sent, UART is disabled until the first paging reception
that occurs after a timeout of 2.0 s, and therefore the interface is enabled again

LTE: UART is asynchronously enabled to paging receptions, as UART is enabled for ~20 ms, and then, if data
are not received or sent, UART is disabled for 2.5 s, and afterwards the interface is enabled again

Not registered: when a module is not registered with a network, UART is enabled for ~20 ms, and then, if
data has not been received or sent, UART is disabled for 2.5 s, and afterwards the interface is enabled again
When the UART interface is enabled, data can be received. When a character is received, it forces the UART
interface to stay enabled for a longer time and it forces the module to stay in the active-mode for a longer time,
according to the timeout configured by the second parameter of the +UPSV AT command. The timeout can be
UBX-16010573 - R02
RTS line DTR line
ON ON
ON OFF
OFF ON
OFF OFF
ON or OFF ON
ON or OFF OFF
Objective Specification
LARA-R2 series - System Integration Manual
Communication during idle-mode and wake up
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE.
Data sent by the DTE is lost by the module.
Data sent by the module is correctly received by the DTE.
Data sent by the DTE is correctly received by the module.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be ON).
Data sent by the DTE is lost by the module.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be ON).
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data are lost.
Data sent by the DTE is lost by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data are lost.
System description
Page 42 of 148