u-blox LARA-R2 series System Integration Manual page 116

Reference Description
C1 100 nF Capacitor Ceramic X5R 0402 10% 10V
C2, C4, C5, C6 1 µF Capacitor Ceramic X5R 0402 10% 6.3 V
C3 10 µF Capacitor Ceramic X5R 0603 20% 6.3 V
C7, C8, C9, C10 27 pF Capacitor Ceramic COG 0402 5% 25 V
C11, C12, C13, C14 10 nF Capacitor Ceramic X5R 0402 10% 50V
D1, D2 Low Capacitance ESD Protection
EMI1, EMI2, EMI3, Chip Ferrite Bead Noise/EMI Suppression Filter
EMI4 1800 Ohm at 100 MHz, 2700 Ohm at 1 GHz
J1 Microphone Connector
J2 Speaker Connector
MIC
2.2 k Electret Microphone
R1, R2
4.7 k Resistor 0402 5% 0.1 W
R3
10 k Resistor 0402 5% 0.1 W
R4, R5 2.2 k Resistor 0402 5% 0.1 W
SPK 32  Speaker
U1 16-Bit Mono Audio Voice Codec
Table 47: Example of components for audio voice codec application circuit
Do not apply voltage to any I
circuits and allow a proper boot of the module. If the external signals connected to the cellular module
cannot be tri-stated or set low, insert a multi channel digital switch (e.g. TI SN74CB3Q16244, TS5A3159,
or TS5A63157) between the two-circuit connections and set to high impedance before V_INT switch-on.
ESD sensitivity rating of I
protection level could be required if the lines are externally accessible and it can be achieved by mounting
a general purpose ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible points.
2
If the I S digital audio pins are not used, they can be left unconnected on the application board.
2.7.1.2 Guidelines for digital audio layout design
2
I S interface and clock output lines require the same consideration regarding electro-magnetic interference as
any other high speed digital interface. Keep the traces short and avoid coupling with RF lines / parts or sensitive
analog inputs, since the signals can cause the radiation of some harmonics of the digital data frequency.
2.7.1.3 Guidelines for analog audio layout design
Accurate design of the analog audio circuit is very important to obtain clear and high quality audio. The GSM
signal burst has a repetition rate of 217 Hz that lies in the audible range. A careful layout is required to reduce
the risk of noise from audio lines due to both VCC burst noise coupling and RF detection.
General guidelines for the uplink path (microphone), which is commonly the most sensitive, are the following:

Avoid coupling of any noisy signal to microphone lines: it is strongly recommended to route microphone
lines away from module VCC supply line, any switching regulator line, RF antenna lines, digital lines and any
other possible noise source.

Avoid coupling between microphone and speaker / receiver lines.

Optimize the mechanical design of the application device, the position, orientation and mechanical fixing
(for example, using rubber gaskets) of microphone and speaker parts in order to avoid echo interference
between uplink path and downlink path.
UBX-16010573 - R02
2
S pin before the switch-on of I
2
S interface pins is 1 kV (Human Body Model according to JESD22-A114). Higher
Objective Specification
LARA-R2 series - System Integration Manual
Part Number – Manufacturer
GRM155R71C104KA01 – Murata
GRM155R60J105KE19 – Murata
GRM188R60J106ME47 – Murata
GRM1555C1H270JZ01 – Murata
GRM155R71C103KA88 – Murata
USB0002RP or USB0002DP – AVX
BLM15HD182SN1 – Murata
Various manufacturers
Various manufacturers
Various manufacturers
RC0402JR-074K7L - Yageo Phycomp
RC0402JR-0710KL - Yageo Phycomp
RC0402JR-072K2L – Yageo Phycomp
Various manufacturers
MAX9860ETG+ - Maxim
2
S supply source (V_INT), to avoid latch-up of
Design-in
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