u-blox LARA-R2 series System Integration Manual page 28

Figure 13 shows the module power-on sequence from the not-powered mode, describing the following phases:

The external supply is applied to the VCC module supply inputs, representing the start-up event.

The V_BCKP RTC supply output is suddenly enabled by the module as VCC reaches a valid voltage value.

The PWR_ON and the RESET_N pins suddenly rise to high logic level due to internal pull-ups.

All the generic digital pins of the module are tri-stated until the switch-on of their supply source (V_INT).

The internal reset signal is held low: the baseband core and all the digital pins are held in the reset state. The
reset state of all the digital pins is reported in the pin description table of LARA-R2 series Data Sheet [1].

When the internal reset signal is released, any digital pin is set in a proper sequence from the reset state to
the default operational configured state. The duration of this pins' configuration phase differs within generic
digital interfaces and the USB interface due to host / device enumeration timings (see section 1.9.2).

The module is fully ready to operate after all interfaces are configured.
Start-up
event
VCC
V_BCKP
PWR_ON
RESET_N
V_INT
Internal Reset
System State
Tristate / Floating
BB Pads State
Figure 13: LARA-R2 series power-on sequence description
The greeting text can be activated by means of +CSGT AT command (see u-blox AT Commands Manual [2]) to
notify the external application that the module is ready to operate (i.e. ready to reply to AT commands) and the
first AT command can be sent to the module, given that autobauding has to be disabled on the UART to let the
module sending the greeting text: the UART has to be configured at fixed baud rate (the baud rate of the
application processor) instead of the default autobauding, otherwise the module does not know the baud rate
to be used for sending the greeting text (or any other URC) at the end of the internal boot sequence.
The Internal Reset signal is not available on a module pin, but the host application can monitor the V_INT
pin to sense the start of the LARA-R2 series module power-on sequence.
Before the switch-on of the generic digital interface supply source (V_INT) of the module, no voltage
driven by an external application should be applied to any generic digital interface of the module.
Before the LARA-R2 series module is fully ready to operate, the host application processor should not send
any AT command over the AT communication interfaces (USB, UART) of the module.
UBX-16010573 - R02
Start of interface
configuration
OFF
Internal Reset
Internal Reset → Operational Operational
Objective Specification
LARA-R2 series - System Integration Manual
Module interfaces
are configured
ON
System description
Page 28 of 148