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4.1.4. Stopping Automatic Chip Erasing
When the user attempts to cancel the automatic chip erasing in the middle of the process, cancel the automatic chip
erasing as follows:
The flash memory returns to read mode.
1. Read [FCSR0]<RDYBSY>.
2. If the result of Procedure 1 is "1" (Ready), end at Procedure 9. If the result is "0" (Busy), proceed to
Procedure 3.
3. Write "0x7" to [FCCR]<WEABORT>.
4. Write "0x0" to [FCCR]<WEABORT>.
5. Poll until [FCSR0]<RDYBSY>=1(Ready).
6. Read [FCSR1]<WEABORT>
7. Issue the Read/reset command.
8. If the result of Procedure 6 is "0", end at Procedure 9. If the result of Procedure 6 is "1", perform the
following operation to clear this flag:
1)
Write "0x7" to [FCSTSCLR]<WEABORT>.
2)
Write "0x0" to [FCSTSCLR]<WEABORT>.
3)
Poll until [FCSR1]<WEABORT>=0.
9. End
Note: Before write to [FCCR], need clear protection by [FCKCR].
4.1.5. Completion Detection of the Automatic Operation
The flash memory has an interrupt function to detect the completion of programming/erasing operation.
Completion of the programming/erasing
operation of a code flash
Completion of the programming/erasing
operation of a code flash
When an automatic chip erasing command sequence is performed, first, INTFLDRDY occurs at the time of the end
of programming/erasing to a data flash. Next, INTFLCRDY1 occurs in generating at the time of the end of
programming/erasing to a code flash (FLASH I/F1). Finally, INTFLCRDY0 occurs in generating at the time of the
end of programming/erasing to a code flash (FLASH I/F0).
4.1.5.1. Procedure
The procedure (in the case of a data flash) which uses completion detection interruption of automatic operation is as
follows.
Please refer to chapter "Interrupts" of a reference manual "Exception" for the details of interruption processing.
1. Enable INTFLDRDY interruption.
2. After issued automatic programming or erasing command to a data flash, check under automatic operation
(BUSY state) by [FCSR0]<RDYBSY>.
3. An INTFLDRDY interrupt occurs after the end of automatic programming or erasing of data flash.
2018-06-05
Table 4.2 Detection of Completion Flash programming/Erasing
Item
Signal name
Code FLASH Ready interruption of
INTFLCRDY0
FLASH I/F0
Code FLASH Ready interruption of
INTFLCRDY1
FLASH I/F1
INTFLDRDY
Data FLASH Ready interruption
60 / 120
Flash Memory
Interruption name
TXZ Family
Rev. 2.0
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