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4. Set the area selection bit of the [FCAREASEL] register before executing each command. (Write
"111" to <AREAn>).
Note that when the following commands are executed, set all area selection bits.
5. Set each bus write cycle using consecutive 1-word (32-bit) data transfer instruction.
6. If an access is performed to the target Flash memory in each command sequence, a bus fault
occurs.
7. When issuing commands, if wrong addresses or data are inputted, make sure to issue Read/Reset
command, then return to read mode.
8. Confirmation procedure after each command completion is as follows:
1)
2) Poll until [FCSR0]<RDYBSY>=0(Busy).
3) Poll until [FCSR0]<RDYBSY>=1(Ready).
9. When data is read from the flash memory, clear the area selection bit of the [FCAREASEL]
register. (Set "000" to <AREAn>.)
When there are two or more FLASH I/F, reprogramming in a dual mode is possible for command sequence other
than the above. For example, when there are the FLASH I/F 0 and the FLASH I/F 2, a program can be run on the
flash memory of area (FLASH I/F 0) other than the flash memory of the object (FLASH I/F 2) which performs
programming/erasing (vice versa can be possible).
An interrupt can be used only when program is written to FLASH I/F2 (Data Flash memory) in Dual mode.
2018-06-05
Automatic chip erasing command
ID-Read command
Automatic security bit programming command
Automatic security bit erasing command
Automatic protect bit programming command
Automatic protect bit erasing command
Automatic memory swap command
Automatic memory swap erasing command
Automatic chip erasing command
ID-Read command
Automatic security bit programming command
Automatic security bit erasing command
Automatic protect bit programming command
Automatic protect bit erasing command
Automatic memory swap command
Automatic memory swap erasing command
Execute the final bus write cycle
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TXZ Family
Flash Memory
Rev. 2.0
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