Ametek 7280 Instruction Manual page 179

Wide bandwidth dsp lock-in amplifier
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Outputs
Data Storage
User Settings
CH1 CH2 Outputs
Function
Amplitude
Impedance
Update Rate:
X, Y or R
TC ≤ 500 µs
1 ms ≤ TC ≤ 4 ms
TC ≥ 5 ms
All other outputs
Signal Monitor
Amplitude
Impedance
Auxiliary D/A Output 1 and 2
Maximum Output
Resolution
Output Impedance
8-bit Digital Port
Mode
Status
Trigger Input
Reference Output
Waveform
Impedance
Power - Low Voltage
Data Buffer
Size
Max Storage Rate
From LIA
From ADC1
Appendix A, SPECIFICATIONS
X, Y, R, θ, Noise, Ratio, Log Ratio and User
Equations 1 & 2.
±2.5 V full-scale but capable of operating
to ±300 % full-scale
1 kΩ
7.5 MHz
7.5 MHz or 1 kHz
1 kHz
1 kHz
±1 V FS
1 kΩ
±10 V
1 mV
1 kΩ
0 to 8 lines can be configured as inputs, with the
remainder being outputs.
Each output line can be set high or low and each
input line read to allow interaction with external
equipment
Extra line acts as extra trigger input
0 to 3 V rectangular wave
TTL-compatible
±15 V at 100 mA rear panel 5-pin 180° DIN
connector for powering EG&G preamplifiers
32k × 16-bit data points, may be organized as 1×32k,
2×16k, 3×10.6k, 4×8k, etc.
up to 1000 16-bit values per second
up to 40,000 16-bit values per second
Up to 8 complete instrument settings can be
A-5

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