Mitsubishi Electric QJ71DN91 User Manual page 110

Melsec q series, devicenet master-slave module
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7 PROGRAMMING FOR EXECUTING THE MASTER FUNCTION
Programmable controller CPU
1)Transmit request
M0
D0
Transmit
D1
data
D2
7
7 - 2
(4)
When data of multiple words is sent from/received in the buffer memory of the
QJ71DN91, data inconsistency may occur.
When sending/receiving data of multiple words, use Data consistency dedicated
instruction (DNTMRD, DNTMWR, DNTSRD, DNTSWR).
REMARK
With MOV or FROM/TO instruction, data inconsistency can be avoided by checking
data transfer.
The following shows an example in which data transfer is checked by providing a
handshake area at the end of send/receive data.
QJ71DN91 master
Master function
receive data
700
H
701
H
702
H
703
(Transmit complete flag)
H
Master function
7)
transmit data
900
H
2)
901
Transmit data
H
902
H
3)
903
(Transmit request flag)
H
QJ71DN91 slave
Programmable controller CPU
Slave function
transmit data
C00
H
C01
H
C02
H
6)
(Receive completion
C03
H
notification flag)
Slave function
receive data
B00
H
5)
B01
Receive data
H
B02
H
4)
B03
(Receive complete flag)
H
MELSEC-Q
D100
D101
Receive data
D102
7 - 2

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