IBM AS/400e User Handbook Manual page 48

AS/400 System Architecture: Underlying Strength of the AS/400e
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The main system processor complex (which itself can be comprised of 24 separate
processors) can encounter a request for data to be read from or written to any I/O device.
That request for data is delegated to the particular microprocessor dedicated to that I/O
device. Meanwhile, the main system processor continues executing another application
program. Nanoseconds (10
access times. I/O operations are measured in milliseconds (10
The previous figure shows a high-level overview of the structure of the 840 server. Central in
the figure is the extremely high speed memory-processor-I/O interconnect switch at
36 GB/sec. This allows for data transfers between components connected to the switch to
proceed at a very high rate. Separate connections to the switch are provided for each group
of six processors, each of four banks of memory, and two connections for I/O traffic. These
independent paths result in much superior performance than previous designs with a single
common shared memory bus path, for which all components contended.
With the new design, there are many paths to the high speed switch which can operate
separately. Its high bandwidth characteristics allow for connecting source and destination
quickly and efficiently to allow for significant benefit in overall processor speed and system
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AS/400e System Handbook
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second) is the unit of time used to measure main storage
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second).