Channel Switch And Vertical Output; Circuitry - Tektronix 2215A Instruction Manual

produce differential output current to drive the Delay Line
Driver. Internal trigger signals for the Trigger circuitry are
picked-off and channel selection for crt display is controlled
by the Channel Switch circuitry.
Common-base transistors Q102 and Q103 convert dif­
ferential current from the Paraphase Amplifier into level-
shifted voltages that drive the bases of the input transistors
of U130 and the Internal Trigger circuitry. Emitter current for
the input transistors is supplied by Q114 and Q115, and the
base bias is adjusted by R111. The collector current of each
input transistor of U130 serves as emitter current for two
differential output transistor pairs. One of the collectors of
each output pair is grounded and the other provides output
drive to the Delay Line Driver. The base voltages of the
transistors with grounded collectors are held at ground po­
tential by R136. The base voltages of the other transistors
are controlled by the Channel Switch and Trigger View

circuitry.

When Channel 1 is selected to drive the Delay Line
Driver, the Q output of U540A is HI. The transistors with the
ungrounded collectors will then be forward-biased and the
Channel 1 signal will be conducted through to the Delay Line
Driver. If Channel 1 is not selected, then the Q output of
U540A is LO. The transistors with the ungrounded collec­
tors are then reverse-biased and the output signals will be
conducted to ground by the other transistor pair. The gain of
the Preamplifier is set by adjusting R145 to determine how
much signal current will be shunted between the two dif­
ferential outputs.
CHANNEL SWITCH AND VERTICAL
OUTPUT
The Channel Switch circuitry, shown on Diagram 2, uti­
lizes the front-panel VERTICAL MODE switches to select
the crt display format. See Figure 3-2 for a block diagram of
the circuit.
When any display mode other than X-Y is selected, the
XY line connected to S550 is at ground potential. VERTI­
CAL MODE switches S545 and S550 control the connec­
tion between the XY line and the S and R inputs of U540A
to obtain the various display formats described below.
CHANNELJ DISPLAY ONLY. The CH 1_position of S550
grounds the S input of U540A while the R input is held HI
by R539. This will produce a HI and a LO on the Q and Q
outputs respectively, and the Channel 1 Preamplifier signal
will drive the Delay Line Driver as described in the "Vertical
Preamplifier" section. The Channel 2 Preamplifier will be
disabled.
Theory of Operation— 2215A Service
FROM
CHANNEL 1
ATTENUATOR
FROM
CHANNEL 2
ATTENUATOR
Figure 3-2. Block diagram of the Channel Switching circuitry.
CHANNEL 2 DISPLAY ONLY. The CH 2 position of S550
holds the R input of U540A LO through CR538 and the
S input is held HI by R538. The outputs will then be Q LO
and Q HI to enable the Channel 2 Preamplifier signal to drive
the Delay Line Driver while the Channel 1 Preamplifier is
disabled.
To display the ADD, ALT, or CHOP formats, S550 must
be in the BOTH position to ground the A, C, and F pins of
S545.
ADD DISPLAY. In the ADD position of S545, both the S
and R inpute of U540A are held LO by CR534 and CR537.
The Q and Q outputs are then both HI and signal currents
from the Channel 1 and Channel 2 Preamplifiers add to­
gether to drive the Delay Line Driver.
CHOP DISPLAY. In the CHOP position, the Chop Enable
line is held LO keeping the Q output of U540B HI. This en­
ables multivibrator U537D to run at a frequency that is de­
termined by R544, R545, and C545. The output of U537C,
the inverted output of the multivibrator, is used to drive
U537A and U537B.
TO
DELAY
L IN E
DRIVER
4 7 3 5 - 0 2
3-5