Reset\ Control Register; Int Mask Control Register - ICP DAS USA PIO-D48 User Manual

PIO-D48 Series Card
48-channel OPTO-22 Compatible DIO Board

6.3.1 RESET\ Control Register

(Read/Write): wBase+0
Bit 7 Bit 6
Reserved Reserved
When the PC's power is first turned on, RESET\ signal is in a Low-state. This will disable all D/I/O
operations. The user has to set the RESET\ signal to a High-state before any D/I/O command
applications are initiated.
For example:
outportb (wBase,1);
outportb (wBase,0);

6.3.2 INT Mask Control Register

(Read/Write): wBase+5
Bit 7 Bit 6
0 0
EN0=0 Disable INT_CHAN_0 as an interrupt signal (Default).
EN0=1 Enable INT_CHAN_0 as an interrupt signal
EN1=0 disable INT_CHAN_1 as a interrupt signal (Default)
EN1=1 enable INT_CHAN_1 as a interrupt signal
EN2=0 disable INT_CHAN_2 as a interrupt signal (Default)
EN2=1 enable INT_CHAN_2 as a interrupt signal
EN3=0 disable INT_CHAN_3 as a interrupt signal (Default)
EN3=1 enable INT_CHAN_3 as a interrupt signal
Bit 5 Bit 4
Reserved Reserved
/* RESET\=High  all D/I/O are enable now */
/* RESET\=Low  all D/I/O are disable now */
Bit 5 Bit 4
0 0
Bit 3 Bit 2
Reserved Reserved
Bit 3 Bit 2
EN3 EN2
User Manual/Ver. 3.4/Aug. 2015/PMH-006-34/Page: 38
Bit 1 Bit 0
Reserved RESET\
Bit 1 Bit 0
EN1 EN0