Figure 6-2 Image Rendering Module Block Diagram - Compaq PowerStorm 1000 Owner's Manual

Each pixel link contains RGB, alpha, stencil, and Z values plus a pointer to the next
link. Links are stored in receding Z order. These lists are the heart of the HiFIVE anti-
aliasing system, eliminating the need for presorting primitives and multi-pass
algorithms by retaining enough information at multiple Z depths. Figure 6-2 illustrates
an Image Rendering Module block diagram.
While the fragment modification calculations for texture mapping are part of the SSLD
ASIC, the actual mipmap storage is in separate memory on the Texture Memory Modules.
All Image Rendering Modules in a PowerStorm 1000 graphics subsystem must have the
same amount of texture memory, either 32 MB or 64 MB.

Figure 6-2 Image Rendering Module Block Diagram

64
Input from Super Slicer
VDM ASIC (SSD)
32 32
TM TM
Optional
3D Blender
PLM
(SAM)
DIGITAL PowerStorm 1000 Graphics Subsystem Owner's Guide 6–7
112
fragment broadcast
PLM PLM
xyrgb or control
46
RC
Technical Description
64
3D Blender
PLM
(SAM)
ML014290