Vertex Module (Vxm); Image Rendering Module (Irm) - Compaq PowerStorm 1000 Owner's Manual

Technical Description

6.3.4 Vertex Module (VXM)

The Vertex Module contains the Vertex Data Manager (VDM) ASIC, which is the first
state of the rendering pipeline. It has been implemented as its own module to remove a
high pin count BGA package from the motherboard; thereby enhancing manufacturability
and maintainability while providing the capability to replace the entire rendering pipeline
with a future design if required.
The VDM ASIC receives the stream of Image Rendering Module commands from the
AlphaStation system, assembles the data describing the vertices of points, lines, triangles,
and rectangles, computes the additional information needed for their rasterization, and
passes the results to the Image Rendering Module. Commands destined for ASICs further
along the pipeline also pass through the VDM in sequence and with other work, thus
reducing the need for time consuming flush operations.
In addition to its rendering functions, the VDM provides Vertex Bus control.

6.3.5 Image Rendering Module (IRM)

The Image Rendering Module provides rasterization for anti-aliased points, lines and
polygons, depth cueing, multilevel transparency, stenciling, texture mapping, hidden
surface removal, Z ordering of pixels, window clip testing for occluded windows, and
multiple API support. The PowerStorm 1000 graphics subsystem supports configurations
of either two or four Image Rendering Modules.
The module control section provides setup and configuration services while the module
functionality section provides image generation services. The module is implemented
using three ASICs (one Super Slicer Dicer (SSLD) ASIC and two Sub-pixel Area Manager
(SAM) ASICs).
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The SSLD ASIC computes pixel addresses, calculates RGB values and coverage
information for the resulting pixels, applies texture map and depth cue algorithms as
appropriate, and finally passes the pixel fragments into one of two SAM ASICs. The
SSLD also performs Alpha Test and Alpha Modulate functions (required by OpenGL).
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The SAM ASICs contain the necessary facilities for building complex images within
memory buffers called Pixel Link Memory (PLM) buffers.
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Within each Image Rendering Module, four independent banks of PLM buffers serve
interleaved screen pixel locations. They also contain window specific allocation tables
to speed garbage collection for pixel links no longer needed after a swap-buffers
operation. Each SAM manages two banks of PLM buffers in which it allocates and
maintains pixel link lists based on incoming fragments, and computes composite RGB
results to pass on to the Video Memory Module section. The SAM ASICs are
responsible for Stencil/Z tests and operations and fragment blending.
6–6 DIGITAL PowerStorm 1000 Graphics Subsystem Owner's Guide