Compaq PowerStorm 1000 Owner's Manual page 70

Technical Description
The Vertex Data Manager (VDM) ASIC on the Vertex Module provides the interface
between the Graphics Interface Module FIFOs and the Image Rendering Modules. This
VDM ASIC has responsibility for assembling and formatting information for the rendering
pipeline on the Image Rendering Modules. The VDM ASIC also performs Vertex Bus
control.
The Image Rendering Module contains the Super Slicer Dicer (SSLD) ASIC and two Sub-
pixel Area Manager (SAM) ASICs to provide rasterization for anti-aliasing points, lines,
and triangles whose data is stored in Pix Link Memory (PLM) buffers. The final
red/green/blue (RGB) data is transmitted to the RC ASICs.
The RC ASICs are mounted on the Video Memory Modules, one RC per Video Memory
Module. Their main function is to arbitrate incoming pixels generated by the Image
Rendering Modules and/or arriving from the DBus as they funnel into the frame buffer.
The RC ASICs will also configure the frame buffer resolutions, generate the appropriate
video RAM timing, and support pixel operations such as BLT, window erase, and logical
rasterops.
A block diagram of the DIGITAL PowerStorm 1000 graphics subsystem is shown in
Figure 6-1.
6–2 DIGITAL PowerStorm 1000 Graphics Subsystem Owner's Guide