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~~7~~f~TERVALS
15161710 II 12131415161710 II 12131415161710 II 12131415161710 II 12131
DMA TIMING:
TPB
STATE
DMA-IN/DMA-OUT*
DMA-IN ONLyJBUS*
lMWR
DMA-OUT [BUS
ONLY
GS2'TPB)*
I
I
I
I
I
I
I
I
I
II
u
'fj~FNRGNI~~ERVALS
""'I1- 5 'T'1 6 - r-1 7 "T1-0 '-11"'1-2 T"13""'11- 4 'T'15"'"'11r- 6 "T1-7 r-I 0"'1-1 T'"12'1- 3 'T'14"'"'11r- 5 "T1-6 '-1 7 ""T1- 0 'T'11""'I1- 2 'T'13"'"'11r- 4 "T1-5 '-1 6 ""T1- 7 'T'1 0-1r- 1 "T1-2 '-1 3 --r-1
INTERRUPT TIMING:
I
~!
I
I
~!
II
I
~
I I
I
ST:~:
; : SO
f.".
F
51 ;.:.
r~ ~. ~
INTERRUPT*
INTERRUPT ENABLE'"
FLAG INPUT TIMING:
STATE
INHIBIT INTERRUPT
F:="
SO· I
=
3:
-I..
SI • I
=
3
=----FJ
(fSI, S2, S3 OR SO·I"
31
*
=
SIGNAL GENERATED BY USER
... =
INTERNAL TO COSMAC
NOTES:
I.
MINIMUM T DETERMINED BY VDD -- NO MAXIMUM T
2. MEMORY WRITE PULSE WIDTH (MWR)
~
1.5 T
3. MEMORY OUTPUT "OFF" INDICATES HIGH-IMPEDANCE CONDITION.
4. SHADING INDICATES "DON'T CARE" OR INTERNAL DELAYS DEPENDING ON
VDD AND THE CLOCK SPEED.
92CL - 26422
63
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