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COSMAC Microprocessor
29
INTERRUPT ACTION
X,P
-+
T; 1
-+
P;
2
-+
X;
0
-+
IE
N
N
t----+----i
P
3
X
4
X
2
RIOI
-
-
RIOI
-
-
Rill
00
56
Rill
00
56
RI21
01
24
DF
=-
RI21
01
24
DF= -
RI31
02
3C
D
1- 1
RI31
02
3C
I
D
1- I
IE
=
1
IE
=
0
Fig. 37 - Example of instruction - - - INTERRUPT ACTION.
78
SAVE
T
-+
M(R(X))
SAV
When 1=7 and N=8, a SAVE operation is performer'. This operation stores the byte contained in the T
register at the memory location addressed by R(X). Subsequent execution of a RETURN or DISABLE
instruction can then replace the original X and P values to resume (or return to) normal program execution.
70
RETURN
M(R(X))
-+
X, P; R(X)+1; 1
-+
IE
I
RET
I
When 1=7 and N=O, a RETURN operation is performed. The digits in X and P are replaced by the
memory byte addressed by R(X), and R(X) is incremented by 1. The 1-bit Interrupt Enable (IE) latch
is set.
A
01
23
N
0
Gb
P
1
l+- x
2
ADDRESS
M
I
7
01
21
00
RIOI
-
-
01
22
00
Rill
00
56
IALUI-
I
•
A
01
23
N
0
c6
P
3
l -
x
4
I-
ADDRESS
M
I
7
01
21
00
RIOI
-
-
01
22
00
Rill
00
56
IALU I -
I
01
23
43
RI21
01
23
I-
OF
=-
01
23
43
I----
RI21
01
24
t-
OF
= -
01
24
00
RI31
02
3C
I
D
I-
I
.
.
01
24
00
RI31
02
3C
I
0
I- I
+
43
Fig.
38 -
Example of instruction 70 - RETURN.
71
DISABLE
M(R(X))
-+
X, P; R(X)+1;
°
-+
IE
DIS
When 1=7 and N=1, an instruction similar to RETURN is executed, except that in this case IE is reset.
While I E=O, the interrupt line is ignored by the processor.
Either the R ETU RN or DISAB LE instruction can be used to set or reset I E, respectively, as explained
in the section on Machine Code Programming.
Instruction Utilization
The following table shows the use of some of the preceding instructions to form a program. This program
inputs two bytes from different sources, compares them, and outputs the larger. It then continues to repeat
the process.
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