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12 __________________________________________________ __
User Manual for the
Memory or I/O data used in various COSMAC operations are transferred by means of the common data
bus. Memory cycles involve both an address and the data byte itself. Memory addresses are provided by the
contents of scratchpad registers. An example of a memory operation is
M(R(X))
-+
D
This expression indicates that the memory byte addressed by R(X) is copied into the D register. Fig. 4
illustrates this operation. The following steps are required:
1)
X is used to select R.
~
(I.ft
,;d.
of
F; •. 41
2)
R(X) is copied into A.
3)
A addresses a memory byte.
4) The addressed memory byte
J
I,;.h.
,;d.
of
F; •. 41
is gated to the bus.
5)
The bus is gated to D.
Reading a byte from memory does not change the contents of memory.
A
00
02
N
3
6
p
0
l -
x
1
ADDRESS
M
I
-
00
01
FF
R(O)
-
-
00
02
C5
R(l)
00
02
~
IALUI-
I
00
03
AA
R(2)
-
-
DF=-
00
04
23
R(3)
-
-
I
D
I- I
Fig. 4 - Transfer of data from memory to the D register.
The 8-bit arithmetic-logic unit (ALU in Fig. 2) performs arithmetic and logical operations. The byte
stored in the D register is one operand and the byte on the bus (obtained from memory) is the second
operand. The resultant byte replaces the operand in D. A single-bit register data flag (DF) is set to "0" if no
carry results from an add, subtract, or shift operation. DF is set to "1" if a carry does occur. The 8-bit D
register is similar to the accumulator found in many computers.
Instructions and Timing
COSMAC operations are specified by a sequence of operation codes stored in external memory. These
code are called instructions.
Each instruction consists of one 8-bit byte. Two 4-bit hex digits contained in
each instruction byte are designated as I and N, as shown in Fig. 5.
5A (HEX)
I
\
I
N
10 1 0 1
I
1 0 1 0
I
,7654,
~
I
----.-
High Order
Low-Order
Digit
Digit
Fig.
5 -
Eight-bit instruction format.
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