Intermediate Memory In A Dp Cpu Operating As A Dp Slave - Siemens CPU 313C Hardware And Installation Manual

That is, the DP master writes its Data to these intermediate memory address areas
and the CPU reads these data in the user program, and vice versa.
Figure 9-7 Intermediate memory in a DP CPU operating as a DP slave
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In 67(3 , configure the I/O address areas:
• You can configure up to 32 I/O address areas.
• Maximum length per address area is 32 bytes.
• You can configure a maximum of 244 input bytes and 244 outputs bytes.
The table below shows the principle of address areas. You can also find this figure
in the 67(3  configuration.
Table 9-10
7\SH
1 E
2 A
:
32
Address areas in the
DP master CPU
S7-300 Automation System, Hardware and Installation: CPU 31xC and CPU 31x
A5E00105492-03
DP master
Transfer memory
in the address
area
PROFIBUS
Configuration example for the address areas in intermediate memory
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222 A
0 E
Address areas in the
DP slave CPU
CPU as DP slave
I/Q
6ODYH /HQJW
DGGUHVV K
310 2 Byte
13 10 Word
These address area parameters
must be identical for DP master and
DP slave
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I/Q
8QLW &RQVLVWHQF\
Unit
Total length
9-29