Rabbit 3000 User Manual page 89

When operating in 32 kHz mode it is also possible to further divide the clock to a fre-
quency as low as 2 kHz, further reducing execution speed and current consumption.
Global Power Save Control Register
Bit(s) Value
000
001
01x
7:5 100
101
110
111
0
4
1
3 x
000
001
01x
2:0 100
101
110
111
It is anticipated that these measures would reduce operating current consumption to as low as
20 µA plus some additional leakage that would be significant at high operating temperatures.
User's Manual
Self-timed chip selects are disabled.
This bit combination is reserved and should not be used.
This bit combination is reserved and should not be used.
296nS self-timed chip selects (192nS best case, 457nS worst case).
234nS self-timed chip selects (151nS best case, 360nS worst case).
171nS self-timed chip selects (111nS best case, 264nS worst case).
109nS self-timed chip selects (71nS best case, 168nS worst case).
Normal Chip Select operation.
Short Chip Select timing when dividing main oscillator by 4, 6, or 8.
This bit is reserved and should not be used.
The 32KHz clock divider is disabled.
This bit combination is reserved and should not be used.
This bit combination is reserved and should not be used.
32KHz oscillator divided by two (16.384KHz).
32KHz oscillator divided by four (8.192KHz).
32KHz oscillator divided by eight (4.096KHz).
32KHz oscillator divided by sixteen (2.048KHz).
(GPSCR) (Address = 0x0D)
Description
81