Table 12-17. Extended Register Asynchronous Mode All Ports
Serial Port x Extended Register
Bit(s)
Value
7:5
xxx
0
4
1
0
3
1
0
2
1
1:0
xx
158
Description (Async mode only)
These bits are ignored in async mode.
Normal async data encoding.
Enable RZI coding (3/16ths bit cell IRDA-compliant).
Normal Break operation. This option should be selected when address bits are
expected.
Fast Break termination. At the end of Break a dummy character is written to the
buffer, and the receiver can start character assembly after one bit time.
Async clock is 16X data rate.
Async clock is 8X data rate.
These bits are ignored in async mode.
(SAER)
(Address = 0xC5)
(SBER)
(Address = 0xD5)
(SCER)
(Address = 0xE5)
(SDER)
(Address = 0xF5)
(SEER)
(Address = 0xCD)
(SFER)
(Address = 0xDD)
Rabbit 3000 Microprocessor
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