Rabbit 3000 User Manual page 144

The following table summarizes Timer A's capabilities.
Timer
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
The control/status register for Timer A (TACSR) is laid out as shown in Table 11-3.
Table 11-3. Timer A Control and Status Register (adr = 0A0h)
Bit 7
A7 count A6 count
Read
done done
A7 A6
Write interrupt interrupt
enable enable
Bits 1–7—Read/write, terminal count reached on timers A1-A7. Reading this status regis-
ter clears any bits (bits 1-7) that are on. Writing to these bits enables the interrupts for the
corresponding timer.
Bit 0—Write, set to a "1" to enable the clock (perclk/2) for Timer A, set to "zero" to dis-
able the clock (perclk/2 in Figure 11-1). Bits 1-7 are written (write only) to enable the
interrupt for the corresponding timer.
136
Table 11-2. Timer A Capabilities
Cascade Interrupt
none yes
from A1 yes
from A1 yes
from A1 yes
from A1 yes
from A1 yes
from A1 yes
none no
none no
none no
Bit 6 Bit 5 Bit 4
A5 count A4 count
done done
A5 A4
interrupt interrupt
enable enable
Dedicated connection
Parallel Ports D-G, Timer B
Serial Port E
Serial Port F
Serial Port A
Serial Port B
Serial Port C
Serial Port D
Input Capture
Pulse Width Modulator
Quadrature Decoder
Bit 3 Bit 2
A3 count A2 count A1 count
done done done
A3 A2 A1
interrupt interrupt interrupt
enable enable enable
Rabbit 3000 Microprocessor
Bit 1 Bit 0
This bit is
write
only.
1—enable
Timer A
main
clock
(pclk/2)