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Summary of Contents for Tews Technologies TPMC310
- Page 1 TPMC310 Conduction Cooled PMC Isolated 2 x CAN Bus Version 1.1 User Manual Issue 1.1.5 January 2011 TEWS TECHNOLOGIES GmbH Am Bahnhof 7 25469 Halstenbek, Germany Phone: +49 (0) 4101 4058 0 Fax: +49 (0) 4101 4058 19 e-mail: info@tews.com...
- Page 2 However TEWS TECHNOLOGIES GmbH reserves the right to change the product described in this document at any time without notice. TEWS TECHNOLOGIES GmbH is not liable for any damage arising out of the application or use of the device described herein.
- Page 3 New Notation for User Manual and Engineering Documentation December 2008 (1) Corrected I/O Line Configuration Table (2) Added note for the Bus_End Option 1.1.5 January 2011 (3) Added note for supported baud rate range to Technical Specification Table TPMC310 User Manual Issue 1.1.5 Page 3 of 22...
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Page 4: Table Of Contents
4.3 Configuration EEPROM ........................15 4.4 Local Software Reset........................16 PROGRAMMING HINTS ..................17 5.1 CAN Controller (SJA1000)......................17 CONFIGURATION HINTS ..................19 6.1 I/O Line Configuration ........................19 6.2 Solder Pad Location ........................20 PIN ASSIGNMENT ....................21 TPMC310 User Manual Issue 1.1.5 Page 4 of 22... - Page 5 TABLE 5-1 : OUTPUT CONTROL REGISTER ....................17 TABLE 5-2 : CLOCK DIVIDER REGISTER ....................18 TABLE 6-1 : I/O LINE CONFIGURATION......................19 TABLE 6-2 : FACTORY DEFAULT I/O LINE CONFIGURATION ..............19 TABLE 7-1 : P14 I/O PIN ASSIGNMENT......................22 TPMC310 User Manual Issue 1.1.5 Page 5 of 22...
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Page 6: Product Description
1 Product Description The TPMC310 is a conduction cooled single-width 32 bit PMC module providing a two channel high speed CAN bus interface. The PLX Technology PCI9030 PCI Target Chip is used for the PCI bus interface. Two Philips SJA1000 CAN Controllers (CAN specification 2.0B supported) are used for the CAN bus interface (one for each channel). -
Page 7: Technical Specification
150mA typ @ + 5.0V DC Temperature Range Operating : -40°C to + 85°C Storage : -55°C to +125°C MTBF 372000 h Weight Humidity 5 – 95 % non-condensing Table 2-1 : Technical Specification TPMC310 User Manual Issue 1.1.5 Page 7 of 22... -
Page 8: Local Space Addressing
PCI9030 PCI Base Address 2 (Offset 0x18 in PCI9030 PCI Configuration Register Space) Offset to PCI Register Name Size Base Address (Bit) 0x00 CAN CONTROL REGISTER 0x01 CAN STATUS REGISTER 0x02 … 0x0F Reserved Table 3-2 : PLD Register Space TPMC310 User Manual Issue 1.1.5 Page 8 of 22... -
Page 9: Can Control Register
The PCI9030 LINTx# local interrupt inputs are used in active low level sensitive mode. The CAN interrupts must be acknowledged via SJA1000 registers (CAN Controller Register Space). Please see the SJA1000 CAN Controller Manual for more information. TPMC310 User Manual Issue 1.1.5 Page 9 of 22... -
Page 10: Can Status Register
The PCI9030 LINTx# local interrupt inputs are used in active low level sensitive mode. The CAN interrupts must be acknowledged via SJA1000 registers (CAN Controller Register Space). Please see the SJA1000 CAN Controller Manual for more information. TPMC310 User Manual Issue 1.1.5 Page 10 of 22... -
Page 11: Can Controller Register Space
The CAN controllers must be set to operating mode (CAN Control Register in PLD Register Space) before CAN controller register access. Please see the SJA1000 CAN Controller Manual for a detailed register description. TPMC310 User Manual Issue 1.1.5 Page 11 of 22... -
Page 12: Pci9030 Target Chip
Y[23:16] 00 00 00 06 0x4C VPD Address VPD Nxt Cap. VPD Cap. ID Y[31:16] 0000 00 03 0x50 VPD Data 00000000 Table 4-1 : PCI9030 PCI Header Subsystem-ID: TPMC310-10: 0x000A TPMC310 User Manual Issue 1.1.5 Page 12 of 22... -
Page 13: Pci Base Address Initialization
To enable PCI I/O Space access to the PCI9030, bit 0 must be set to '1'. To enable PCI Memory Space access to the PCI9030, bit 1 must be set to '1'. TPMC310 User Manual Issue 1.1.5 Page 13 of 22... -
Page 14: Local Configuration Register (Lcr)
EEPROM Write Protect Boundary 0x0030 0x50 Miscellaneous Control Register 0x0078_0000 0x54 General Purpose I/O Control 0x0224_9252 0x70 Hidden1 Power Management 0x0000_0000 0x74 Hidden 2 Power Management 0x0000_0000 Table 4-2 : PCI9030 Local Configuration Register TPMC310 User Manual Issue 1.1.5 Page 14 of 22... -
Page 15: Configuration Eeprom
0xFFFF 0xE0 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xF0 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF Table 4-3 : Configuration EEPROM Subsystem-ID Value (EEPROM Offset 0x0C): TPMC310-10: 0x000A TPMC310 User Manual Issue 1.1.5 Page 15 of 22... -
Page 16: Local Software Reset
PCI9030 remains in this reset condition until the PCI Host clears this bit. The contents of the PCI9030 PCI and Local Configuration Registers are not reset. The PCI9030 PCI Interface is also not reset. TPMC310 User Manual Issue 1.1.5 Page 16 of 22... -
Page 17: Programming Hints
OCPOL1 Normal polarity OCTP0 11 : Push-Pull output stage OCTN0 OCPOL0 Normal polarity OCMODE1 01 : Test Output Mode 10 : Normal Output Mode OCMODE0 Table 5-1 : Output Control Register TPMC310 User Manual Issue 1.1.5 Page 17 of 22... -
Page 18: Table 5-2 : Clock Divider Register
1 : Disable Clock Output (not used) Table 5-2 : Clock Divider Register Baud Rate Range: The TPMC310 uses the TJA1050 High-Speed CAN transceiver. The TJA1050 High-Speed CAN Transceiver supports baud rates from 60 kbaud up to 1 Mbaud. TPMC310 User Manual Issue 1.1.5... -
Page 19: Configuration Hints
The I/O line configuration is configured by on board solder pads (there is no jumper solution because the TPMC310 is considered to be used in a vibration-sensitive environment). Possible line configuration options for each of the two I/O channels (CAN CH1, CAN CH2) are: •... -
Page 20: Solder Pad Location
6.2 Solder Pad Location TPMC310 PCB, Top View, Upper Right Corner Figure 6-1 : Solder Pad Location TPMC310 User Manual Issue 1.1.5 Page 20 of 22... -
Page 21: Pin Assignment
7 Pin Assignment The complete TPMC310 I/O interface is available on the 64 pin P14 mezzanine connector ("back I/O"). Bus_End Pass_Through Signal Interface Option Option Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved CAN_CH1_P CAN_CH1_N CAN-HS... -
Page 22: Table 7-1 : P14 I/O Pin Assignment
… Table 7-1 : P14 I/O Pin Assignment Be sure that the P14 connector I/O signals used by the TPMC310 (including the reserved pins) are available and not otherwise used on the J14 connector of the PMC carrier board. The "Out-Node" for each CAN channel is only available if the on board I/O line configuration is set accordingly (pass_through mode).
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