AXIOMTEK SBC8243 User Manual page 86

SBC8243 All-in-One Half-size CPU Card Series User's Manual


3*)3 !1  & 
NOTE:

ISA POST codes are typically output to port address
80h.
POST (hex)
01-02 Reserved
Turn OFF OEM specific cache, shadow...
C0
1. Initialize EISA registers (EISA BIOS only)
03
2. Initialize all the standard devices with default values
Reserved
04
1. Keyboard Controller Self-Test
05
2. Enable Keyboard Interface
Reserved
06
Verifies CMOS basic R/W functionality
07
BE Program defaults values into chipset according to the
MODBINable Chipset Default Table
C1 Auto-detection of onboard DRAM & Cache
C5 Copy the BIOS from ROM into E0000-FFFFF shadow
RAM so that POST will go faster
08 Test the first 256K DRAM
1. Program the configuration register of Cyrix CPU
09
according to the MODBINable Cyrix Register Table
2. OEM specific cache initialization (if needed)
1. Initialize the first 32 interrupt vectors with
0A
corresponding Interrupt handlers Initialize INT no from
33-120 with Dummy(Spurious) Interrupt Handler
2. Issue CPUID instruction to identify CPU type
3. Early Power Management initialization (OEM specific)
?

Description
Standard devices includes:
-DMA controller (8237)
-Programmable Interrupt Controller (8259)
-Programmable Interval Timer (8254)
-RTC chip
Continued . . . . .
Award BIOS Utility