Chapter 2 Operating Principles
2-2.
Operation of Control Parts
(3) Clock circuit
Crystal oscillator X1 oscillates a 48 MHz clock. This clock is send to the CPU (U1A) and the
CPU generates a 384 MHz internal clock and 64 MHz bus clock.
The 64MHz bus clock is fed to the FPGA (U5) and SDRAM (U4).
System Clock
(48MHz)
R13
48MHz
X1
C8
[SA Main PCB]
CL-E720DT
U1A
CPU
163
USB_X1
164
USB_X2
R14
45
CKIO
C9
Internal Clock
(384MHz)
2-28
Bus Clock
(64MHz)
L12
R12
E1
BUSCLK
U5
FPGA
CLK1
BUSCLK
(To SDRAM)