Advantech DSA-3400 User Manual page 42

Network digital signage platform
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Select ECC if your memory module supports it. The memory controller will detect and correct
single-bit soft memory errors. The memory controller will also be able to detect double-bit
errors though it will not be able to correct them. This provides increased data integrity and
system stability.
4.5.7 MGM Core Frequency
This field sets the frequency of the DRAM memory installed. The default setting is Auto Max
266MHz.
4.5.8 System BIOS Cacheable
The setting of Enabled allows caching of the system BIOS ROM at F0000h-FFFFFh, resulting
in better system performance. However, if any program writes to this memory area, a system
error may result.
4.5.9 Video BIOS Cacheable
The Setting Enabled allows caching of the video BIOS ROM at C0000h-C7FFFh, resulting in
better video performance. However, if any program writes to this memory area, a system error
may result.
4.5.10 Memory Hole At 15M-16M
In order to improve performance, certain space in memory can be reserved for ISA cards.
This memory must be mapped into the memory space below 16 MB. The choices are
Enabled and Disabled.
4.5.11 Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles.
Select Enabled to support compliance with PCI specification version 2.1.
4.5.12 Delay Prior to Thermal
This field activates the CPU thermal function after the systems boots for the set number of
minutes. The options are 16Min and 64Min.
4.5.13 AGP Aperture Size (MB)
The field sets aperture size of the graphics. The aperture is a portion of the PCI memory
address range dedicated for graphics memory address space. Host cycles that hit the
aperture range are forwarded to the AGP without any translation. The default setting is 64M.
4.5.14 On-Chip VGA

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