Appendix B Mc68360 Timing Requirements - Texas Instruments TMS320C6000 Manual
Host port to mc68360 interface
Hide thumbs
Also See for TMS320C6000:
- Programmer's manual (373 pages) ,
- Reference manual (269 pages) ,
- Application report (77 pages)
Table of Contents
Advertisement
SPRA545A
Appendix B MC68360 Timing Requirements
Symbol
t
CLKO1 high to address, FC valid [6]
CHAV
t
CLKO1 high to address, FC Invalid [8]
CHAZn
t
CLKO1 low to CS asserted [9]
CLSA
t
AS to DS or CS asserted [9A]
STSA
t
AS to CS asserted [9C]
STCA
t
Address valid to AS,CS,OE asserted [11]
AVSA
t
CLKO1 low to CS negated [12]
CLSN
t
AS,DS,CS,OE,WE negated to address, FC invalid (address hold) [13]
SNAI
t
AS,CS,OE and DS (read) width asserted [14]
SWA
t
AS,DS,CS,OE width negated [15]
SN
t
CLKO1 high to AS,DS,R/W high impedance [16]
CHSZ
t
AS,DS,CS,WE negated to R/W high [17]
SNRN
t
CLKO1 high to R/W high [18]
CHRH
t
CLKO1 high to R/W low [20]
CHRL
t
R/W high to AS,CS, OE asserted [21]
RAAA
t
R/W low to DS asserted (write) [22]
RASA
t
CLKO1 high to data-out valid [23]
CHDO
t
DS,CS,WE negated to data-out invalid (data out hold) [25]
SNDOI
t
Data out valid to DS asserted (write) [26]
DVSA
t
Data In to CLKO1 low (data setup) [27]
DICL
t
AS,DS, negated to DSACK negated [28]
SNDN
t
DS,CS,OE negated to data in invalid (data in hold) [29]
SNDI
t
DS,CS,OE negated to data in high Z [29A]
SHDI
t
DSACK asserted to DSACK valid (skew) [31A]
DADV
t
R/W width asserted (write or read) [46]
RWA
t
Async input setup time [47A]
AIST
t
Async input hold time [47B]
AIHT
t
Data out from CLKO1 high [53]
DOHC
16
TMS320C6000 Host Port to MC68360 Interfacee
Table B–1. Motorola MC68360 Timing Parameters
Characteristic
Min
Max
(ns)
(ns)
0
15
0
4
16
–6
6
14
26
10
4
16
10
75
35
40
10
0
20
0
20
10
47
23
10
10
1
0
50
0
40
10
100
5
10
0
Advertisement
Table of Contents
Need help?
Do you have a question about the TMS320C6000 and is the answer not in the manual?
Questions and answers