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M a i n b o a r d
Recovery boot jumper
The jumper at pins 9, 10, and 11 controls whether the system attempts to boot using the BIOS
programmed in flash memory.
Procedure to disable recovery booting:
1.
Move the recovery boot jumper from pins 9 and 10 to pins 10 and 11.
2.
Reinstall the access cover for your safety (using the original screws), then connect the power
cords to the system.
3.
Turn the system on, and insert the Flash Memory Update Utility diskette in drive A. After
the system boots, the speaker emits a single beep and the recovery process starts. This takes
about three minutes. When the recovery process completes, the speaker emits two beeps.
While in the recovery mode, there is no screen display on the monitor. The keyboard is disabled as
the system automatically recovers the BIOS. The following beep codes describe the recovery status.
Beep Code
2
4
Continuous series
of low beeps
4.
Turn the system off, disconnect all AC power cords from the system, and remove the access
cover.
5.
Move the jumper from pins 10 and 11 back to pins 9 and 10 to enable the normal boot
mode.
6.
Replace the access cover, remove the diskette from drive A, and connect the power cords to
the system.
7.
After running the special recovery mode, run the SSU to specify a new password. See the
'Configuration' chapter.
Processor
The FT5000 can be fitted with up to four Pentium II Xeon processors. They must be fitted from
the bottom socket upwards as shown in the illustration earlier in this section. The appropriate
voltage regulators must also be fitted, as detailed on page 10 of this chapter.
Each Pentium II Xeon processor is packaged in a single edge contact (S.E.C.) cartridge. The
cartridge includes the processor core with an integrated 16 KB primary (L1) cache; the secondary
(L2) cache; a thermal plate; and a back cover. Each S.E.C. cartridge connects to the baseboard
through a 330-pin Slot 2 edge connector. The cartridge is secured by a retention module attached
to the baseboard. Depending on configuration, your system has one to four processors.
The processor external interface is MP-ready and operates at 100 MHz. The processor contains a
local APIC unit for interrupt handling in multiprocessor (MP) and uniprocessor
(UP) environments.
The L2 cache is located on the substrate of the S.E.C. cartridge. The cache includes burst
pipelined synchronous static RAM (BSRAM) and is available in 512 KB, 1 MB, and
2 MB configurations, with ECC that operates at the full core clock rate.
C C A A U U T T I I O O N N
Processor must be appropriate: You might damage the system if you install a processor that is
inappropriate for your system. Make sure your system can handle a newer, faster processor (thermal
and power considerations). For exact information about processor interchangeability, contact your
Mitsubishi Electric PC dealership.
5/6
FT5000 HANDBOOK
Message
Successful completion, no errors.
The system could not boot from the diskette. The diskette may not be bootable.
The wrong BIOS recovery files are being used and/or the flash memory jumper is in
the wrong position.
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