Gt-64260B Initialization; Gt-64260B Gpp Configuration - Motorola MVME5500 Programmer's Reference Manual

GT-64260B Initialization

Serial EEPROM devices are provided to support optional initialization of
the GT-64260B (enabled by an on-board jumper). Using the SROM
initialization method, any of the GT-64260B internal registers or other
system components (that is, devices on the PCI bus) can be initialized.
Initialization takes place by sequentially reading 8-byte address/data pairs
from the SROM and writing the 32-bit data to the decoded 32-bit address
until the data pattern matching the last serial data item register is read for
the SROM (default value = 0xffffffff). The on-board reset logic keeps the
processor reset asserted until this initialization process is completed.

GT-64260B GPP Configuration

The GT-64260B contains a 32-bit GPP. The GPP pins can be configured as
general-purpose I/O pins, as external interrupt inputs, or as specific
control/status pins for one of the GT-64260B internal devices. After reset,
all GPP pins default to general-purpose inputs. Software must then
configure each of the pins for the desired function. The following table
defines the function assigned to each GPP pin on the MVME5500 board.
Table 2-4. GT-64260B GPP Pin Function Assignments
GPP Number Input/Output
0 I
1 I
2 I
3 I
4 O
5 I
6 I
7 I
8 I
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Function
COM1/COM2 interrupts (ORed)
Not Used. Pulled High.
Abort Interrupt
RTC and Thermostat Interrupts (ORed)
Not Used. Pulled high, tied to GPP27.
Not Used. Pulled high, tied to GPP28.
GT-64260B WDMNI Interrupt. Tied to GPP24.
LXT971A Interrupt (10/100Mbit PHY)
PMC 1 Interrupt INT A
GT-64260B Initialization
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