Yamaha RSio64-D Service Manual page 20

RSio64-D
R8A02032BG ( X8810A00 ) CPU ( SWX02 )
PIN
OUTER
NAME I/O
NO.
NO.
VSS -
1 A1
AN2 I
2 A2
AN1 I
3 A3
VSS -
4 A4
RxD1
5 A5 I
SCK1
6 A6 I
UCLK
7 A7 I
A8 VSS -
8
A9 I/O
9 FUNC_DM
A10 -
10 VSS
A11 I/O
11 HOST_DM
O
12 A12 POWER_ENB
O
13 A13 XTAL
I
14 A14 EXTAL
15 A15 VSS -
16 A16 CS7N/PJ6 O
17 A17 TRSTN I
18 A18 I
TDI
A19 I
19 TCK
A20 -
20 VCCQ
B1 I/O
21 MD15
-
22 B2 VSS
I
23 B3 AN3
I
24 B4 AN0
25 B5 VSS -
26 B6 TxD1 O
27 B7 TxD0 O
28 B8 -
VSS
B9 I/O
29 FUNC_DP
B10 -
30 VSS
B11 I/O
31 HOST_DP
I/O
32 B12 SCL
-
33 B13 VSS
-
34 B14 VSS
O
35 B15 CS4N/PJ3
36 B16 TIOC0A/PJ7 O
37 B17 TESTN I
38 B18 I
TMS
B19 -
39 VCCQ
B20 -
40 VCCQ
C1 I/O
41 MD13
C2 I/O
42 MD14
-
43 C3 VSS
-
44 C4 VREFADC
-
45 C5 VSSADC
46 C6 VSS -
47 C7 RxD0 I
48 C8 -
VSS
49 C9 I
VBUS
C10 -
50 VSS
C11 I
51 OVER_CURRENT_N
C12 I/O
52 SDA
O
53 C13 CS0N
O
54 C14 CS2N/PJ1
O
55 C15 CS5N/PJ4
I
56 C16 ASEMDN
57 C17 TDO O
58 C18 -
VCCQ
59 C19 -
VDDPLL
C20 -
60 VDDPLL
D1 I/O
61 MD10
D2 I/O
62 MD11
D3 I/O
63 MD12
-
64 D4 VSS
-
65 D5 VCCADC
-
66 D6 VSS
67 D7 RESN I
68 D8 -
VCCQ
69 D9 O
PULLUP_ENB
70 D10 -
VCCQ
D11 I
71 UCTL
D12 O
72 EICN
D13 O
73 CS1N/PJ0
O
74 D14 CS3N/PJ2
O
75 D15 CS6N/PJ5
I/O
76 D16 ASEBRKAKN
77 D17 VCCQ -
78 D18 -
VCCQ
79 D19 -
VSSPLL
20
FUNCTION
Ground
ADC analog input 2
ADC analog input 1
Ground
Serial input 1
External sync. clock input 1
USB external clock input (48 MHz)
Ground
USB function data -
Ground
USB host data -
USB voltage enable
Crystal oscillator output
Crystal oscillator input (16.9344 MHz)
Ground
SH2A-CPU chip select 7
JTAG test reset input
JTAG test data input
JTAG test clock input
Power supply +3.3 V
Wave memory data bus 15
Ground
ADC analog input 3
ADC analog input 0
Ground
Serial output 1
Serial output 0
Ground
USB function data +
Ground
USB host data +
E bus (I2C) clock input/output (5V compatible)
Ground
SH2A-CPU chip select 4
PWM output
Test input
JTAG test mode select input
Power supply +3.3 V
Wave memory data bus 13
Wave memory data bus 14
Ground
ADC reference power supply +3.3 V
ADC analog ground
Ground
Serial input 0
Ground
USB cable connection monitor (5V compatible)
Ground
USB overcurrent detection (5V compatible)
E bus (I2C) data input/output (5V compatible)
SH2A-CPU chip select 0
SH2A-CPU chip select 2
SH2A-CPU chip select 5
Debug mode configuration
JTAG test data output
Power supply +3.3 V
PLL analog power supply +1.2 V
Wave memory data bus 10
Wave memory data bus 11
Wave memory data bus 12
Ground
ADC analog power supply +3.3 V
Ground
Hardware reset
Power supply +3.3 V
USB pull-up enable
Power supply +3.3 V
USB output control
E bus reset output
SH2A-CPU chip select 1
SH2A-CPU chip select 3
SH2A-CPU chip select 6
Emulator break
Power supply +3.3 V
PLL analog ground
PIN
OUTER
NAME I/O
NO.
NO.
80 VSSPLL
D20 -
81 MD6
E1 I/O
82 MD7
E2 I/O
83 MD8
E3 I/O
84
E4 MD9 I/O
85
E5 VDD -
86
E6 VDD -
87
VSS -
E7
88
VCCQ -
E8
89 VSS -
E9
90 VCCQ -
E10
91 VCCQ
E11 -
92 VSS
E12 -
93 VCCQ
E13 -
94
E14 VSS -
95
E15 VDD -
96
E16 VDD -
97
E17 D31/PF7 I/O
98
D30/PF6 I/O
E18
99 D29/PF5 I/O
E19
100 D28/PF4 I/O
E20
101 MD2
F1 I/O
102 MD3
F2 I/O
103 MD4
F3 I/O
104 MD5
F4 I/O
105
F5 VDD -
106
F16 VDD -
107
F17 D27/PF3 I/O
108
D26/PF2 I/O
F18
109
D25/PF1 I/O
F19
110 D24/PF0 I/O
F20
111 MA2 O
G1
112 MA1
G2 O
113 MD0
G3 I/O
114 MD1
G4 I/O
115
G5 VSS -
116
G16 VSS -
117
G17 D23/PE7 I/O
118
G18 D22/PE6 I/O
119
D21/PE5 I/O
G19
120 D20/PE4 I/O
G20
121 MA6 O
H1
122 MA5
H2 O
123 MA4
H3 O
124 MA3
H4 O
125
H5 VCCQ -
126
H16 VCCQ -
127
H17 D19/PE3 I/O
128
H18 D18/PE2 I/O
129
VCCQ -
H19
130 VCCQ -
H20
131 MA10 O
J1
132 MA9
J2 O
133 MA8
J3 O
134 MA7
J4 O
135 VSS
J5 -
136
J9 VSS -
137
J10 VSS -
138
J11 VSS -
139
VSS -
J12
140
VSS -
J16
141 D17/PE1 I/O
J17
142 D16/PE0 I/O
J18
143 CKOEN
J19 I
144 CKIO
J20 O
145 MA14
K1 O
146
K2 MA13 O
147
K3 MA12 O
148
K4 MA11 O
149
K5 VDD -
150
VSS -
K9
151 VSS -
K10
152 VSS -
K11
153 VSS
K12 -
154 VDD
K16 -
155 CKE
K17 O
156
K18 D15 I/O
157
K19 VSS -
158
K20 VSS -
DM: IC101
FUNCTION
PLL analog ground
Wave memory data bus 6
Wave memory data bus 7
Wave memory data bus 8
Wave memory data bus 9
Power supply +1.2 V
Ground
Power supply +3.3 V
Ground
Power supply +3.3 V
Ground
Power supply +3.3 V
Ground
Power supply +1.2 V
SH2A-CPU data bus 31
SH2A-CPU data bus 30
SH2A-CPU data bus 29
SH2A-CPU data bus 28
Wave memory data bus 2
Wave memory data bus 3
Wave memory data bus 4
Wave memory data bus 5
Power supply +1.2 V
SH2A-CPU data bus 27
SH2A-CPU data bus 26
SH2A-CPU data bus 25
SH2A-CPU data bus 24
Wave memory address bus 2
Wave memory address bus 1
Wave memory data bus 0
Wave memory data bus 1
Ground
SH2A-CPU data bus 23
SH2A-CPU data bus 22
SH2A-CPU data bus 21
SH2A-CPU data bus 20
Wave memory address bus 6
Wave memory address bus 5
Wave memory address bus 4
Wave memory address bus 3
Power supply +3.3 V
SH2A-CPU data bus 19
SH2A-CPU data bus 18
Power supply +3.3 V
Wave memory address bus 10
Wave memory address bus 9
Wave memory address bus 8
Wave memory address bus 7
Ground
SH2A-CPU data bus 17
SH2A-CPU data bus 16
Clock output control for SDRAM
Clock output for SDRAM
Wave memory address bus 14
Wave memory address bus 13
Wave memory address bus 12
Wave memory address bus 11
Power supply +1.2 V
Ground
Power supply +1.2 V
Clock enable for SDRAM
SH2A-CPU data bus 15
Ground