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SAA6579T-X(IC71):RDS
1.Pin layout
1
DATA
2
Vref
3
MUX
4
V
5
dd
GND
6
CIN
7
SCOUT
8
2.Block diagram
ANTI-
4
ALIASING
FILTER
8
7
CLOCKED
COMPARATOR
5
3
REFERENCE
VOLTAGE
6
3.Pin function
Symbol
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CLK
16
15
OSCO
14
OSCI
13
Vdd
12
GND
11
TEST
10
MODE
9
57 kHz
RECONSTRUCTION
BANDPASS
FILTER
(8th ORDER)
COSTAS LOOP
VARIABLE AND
FIXED DIVIDER
VP1
CLOCK
REGERATION
AND SYNC
Non connected
DATA
RDS data output
Vref
Reference voltage output (0.5VDDA)
MUX
Multiolex signal input
Vdd
+5V supply voltage for analog part
GND
Ground for analog part (0V)
CIN
Subcarrier input to comparator
SCOUT
Subcarrier output of reconstruction filter
MODE
Oscllator mode / test control input
TEST
Test enable input
GND
Ground for digital part (0V)
Vdd
+5V supply voltage for digital part
OSCI
Oscillator input
OSCO
Oscillator output
Non connected
CLK
RDS clock output
13
14
OSCILATOR
QUALITY BIT
AND
GENERATOR
DIVIDER
BIPHASE
DIFFERENTIAL
SYMBOL
DECODER
DECODER
TEST LOGIC AND OUTPUT
SELECTOR SWITCH
9
10
11
Description
KS-FX772R
12
1
2
15
15
1-29
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