Eaton EDR-5000 Installation, Operation And Maintenance Manual page 359

Name
Logic.LE42.Out
Logic.LE42.Out inverted
Logic.LE43.Gate Out
Logic.LE43.Timer Out
Logic.LE43.Out
Logic.LE43.Out inverted
Logic.LE44.Gate Out
Logic.LE44.Timer Out
Logic.LE44.Out
Logic.LE44.Out inverted
Logic.LE45.Gate Out
Logic.LE45.Timer Out
Logic.LE45.Out
Logic.LE45.Out inverted
Logic.LE46.Gate Out
Logic.LE46.Timer Out
Logic.LE46.Out
Logic.LE46.Out inverted
Logic.LE47.Gate Out
Logic.LE47.Timer Out
Logic.LE47.Out
Logic.LE47.Out inverted
Logic.LE48.Gate Out
Logic.LE48.Timer Out
Logic.LE48.Out
Logic.LE48.Out inverted
Logic.LE49.Gate Out
Logic.LE49.Timer Out
Logic.LE49.Out
Logic.LE49.Out inverted
Logic.LE50.Gate Out
Logic.LE50.Timer Out
Logic.LE50.Out
Logic.LE50.Out inverted
Logic.LE51.Gate Out
Logic.LE51.Timer Out
Logic.LE51.Out
Description
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
Signal: Negated Latched Output (Q NOT)
Signal: Output of the logic gate
Signal: Timer Output
Signal: Latched Output (Q)
www.eaton.com
EDR-5000 IM02602007E
359