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5. 3.7.
1.5
On
return
from
standby, the
standby
IRQ
latch
is
again
set
by
the standby
signal
from
the
keyboard
block.
The
standby
ON/OFF
latch
is
clocked to the reset
state,
the
power
supply
is
returned
to
normal
operation,
and IC30b
is
enabled.
The
input to
IC32b
rises
as
C121
charges,
removing
the reset
signal
from
the
GPIB
interface
and
enabling the
microprocessor
IRQ
input.
The
microprocessor
is
now
able
to
accept
the
IRQ
from IC30a.
At
the
end
of the
restart
sequence,
the
standby
IRQ
latch
is
reset.
5. 3.7.
1.6
When
the
encoder
in
the
keyboard system
has
data ready
to
be read by the
microprocessor,
the
keyboard
IRQ
latch
is
clocked
via the
KEYBOARD DATA READY
line.
The
latch outputs provide the
keyboard
IRQ
and
a
keyboard
IRQ
flag.
Once
the
keyboard has
been
identified as the
source of
the interrupt,
the latch
is
reset
by the
microprocessor.
5.
3.7.2
Circuit Description
5. 3.7.
2.1
The
schematic
is
shown
on page
7-11.
5.3.7
.2.2
Reset
Circuit
5.3.7
.2.
2.1
The
RESET
signal
is
generated
in
the circuit containing
Q27, Q29a,
d,
and
e,
and C125.
When
the
instrument
is
switched
on,
the
input to
IC32f
is
held
low
until
C125
charges through R215, Q29a, and
R216.
The
output
at
IC32M2
goes
to logic
1
when power
is
applied, but drops to logic
0
after
approximately
500
ms.
This
output
is
inverted by
IC32e
to provide the
microprocessor
reset
and
by
Q29c
to
provide
the
GPIB
reset.
5.3. 7.2.
2.2
If
there
is
a reduction
in
the
+5V
STANDBY
supply,
due
to
the instrument
being
switched
off or
to
power
failure,
the potential across
R217
falls.
The
potential
at
Q27
emitter
is
maintained by
the
charge
in
C125,
so
Q27
conducts.
The
current
in
R218
makes
the
base
of
Q29d
positive,
so the transistor
conducts and
holds
the
base
of
Q27
low
until
C125
is
completely
discharged.
This ensures
that a
good
reset
action
is
obtained,
even
if
the
power
is
quickly restored.
5.3.7
.2.3
Standby Operation
5.3.7
.2.3.
1
On
switching
to standby,
PL1
pin
14
is
taken
to
0V
by
the
STANDBY
key.
Debouncing
is
provided by
R158
and C126.
The
leading
edge
of
the
signal
is
sharpened
in
IC32c,
C118, R151, and
IC32d, and
sets
the
standby
IRQ
latch IC3Gc,
d.
5.
3.7.
2.
3.2
The
negative-going output
from IC30c-10
is
passed
via
IC30a, IC32a, and
R152
to
IC19-2
to provide a
microprocessor
interrupt.
The
positive-going
output
from
IC30d-ll
forms
the standby
IRQ
flag
(read
by
the microprocessor
via
IC23
during the
interrupt routine)
and
clocks the
standby
latch
IC26b
to the set
state.
5. 3.7. 2.
3.3
The
logic
0
level at
IC26b-8 switches on
Q13
and provides
power
for
the
STANDBY LED
via
PL1
pin
8.
The
same
output
is
applied
to
IC30b-5
and
disables the
other interrupts
which
are
connected
to
IC30b-6.
5.3. 7.2.
3.
4
The
logic
1
level
at
IC26b-9
shuts
down
the
power
supplies
except
the
+5V
STANDBY
supply.
5. 3.
7.
2. 3.
5
At
the
end
of
the interrupt routine, the
microprocessor
resets the
standby
IRQ
latch
by applying
logic
1
to
IC30c-8
from
IC19-7.
5-17
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