Advanced Micro Computers Am96/4016 User Manual page 53

CHAPTER 5
PEIRIPHERAL PR:OGRAMMING
5-1. PARALLEL I/O
The Am8255A provides three 8-bit paral-
1
el I/O ports into or out of the lower
eight lines of the internal data bus.
I n the standard Ev aul at i on Board con-
figuration, the three ports (A, Band
C) are used for up/down program loading
and remote console control from the
AmSYS 8/8 Development System. Port A
is used for data output to the Develop-
ment System, port B for data input, and
port C for software-controlled hand-
shaking (4 bits in, 4 bits out)m
During power-up initial iZCltion, the
Monitor writes an 8-bit Operation Con-
trol Word to the Am8255A control reg-
ister for this purpose. In addition, a
Bit Set/Reset handshaking byte is writ-
ten to the same I/O address by the Mon-
itor for each byte of data sent to port
A, and the port C lines are read for a
response from AmSYS 8/8 that the
1
ast
data byte was received.
For non-standard uses of tlhe P3 edge
connector, the 8-bit Operation Control
Word must be rewritten after initiali-
zation by the Monitor. There are three
modes of operation possible:
Mode 0 - Basic input or output with-
out strobed handshaking (but
all owi ng software handshake
rout i nes) • Ports A and B
are 8 bi ts each and port C
consists of two 4-bit ports.
Any port can be input or
output. Outputs are latched;
inputs are not. In the
standard Evaluation Board,
the Am8255A is initialized
in this mode.
Mode 1 - Input or out put
li
n conj unc-
t i on with strobed handshak-
ing signals. Port A consists
of 8 data lines in conjunc-
t i on wi th the upper four
handshake
11
ines of port C.
Port B iss imi
1
ar but uses
the lower four lines of port
C for handshake • All data
1
i nes are
1
atched , whet her
input or out put.
Mode 2 - Bidirectional data transfers
on the ei ght
1
i nes of port
A, controlled by the upper
five monodirectional lines
of port C. Port A is
latched on both input and
output. The lower three
lines of port C and the
ei ght
1
i nes of port Bare
monodirectional input or
output data lines.
The form of the 8-bit Operation Control
Word is shown in table 5-1.
Port C contains an 8-bit output
latch/buffer and an 8-bit input buffer
(no latch). Any of the output bits ~an
be set or reset with an output instruc-
t i on to the same address accord i ng to
the 8-bit Bit Set/Reset Control Word
shown in table 5-2.
After initialization, data or control
bytes can be transfered at ports A, B
and C using the I/O addresses shown in
table 5-3.
The six 14-pin sockets provided for
drivers and terminators between the
Am8255A and the P3 edge connector limit
the use of all three ports to either
input or output, i.e., no bid~ection~l­
ity, which is normally pos.s1ble
w1~h
port A in Mode 2. However, 1f there 1S
only a short di stance between the P3
edge connector and the external device,
the driver/terminator sockets can be
shorted with headers and jumpers to get
bid i rect ion ali t yin po rt A at the ex-
pense of sacrificing buffering.
Refer to the AMD Am8255A Data Sheet for
more details.
5-1