Table of Contents
Advertisement
Non-standard uses of the P3 edge con-
nector may requi re di fferent devi ces
for these sockets.
Some of the pos-
sible devices are listed in table 2-3.
Alternatively, the sockets can be jump-
ered
for
direct
connection
to
the
Am8255A pins.
2-6. EDGE CONNECTORS
A minimum of two edge connectors must
be used to operate the board.
Power
(+I2V, -12V, +5V) and ground must be
supp1 ied through the PI connector.
A
system console must also be connected
on one of the remaining connectors:
either P4 for the AMC-supp1ied key-
board/display console or P6 for a user-
supplied tennina1.
Many additions to these required con-
nections are possible, as indicated in
the list of edge-connector characteris-
tics and applications below. This list
is norma11 y not needed if you are i n-
stall ing a standard confi gurat ion i 1-
1ustrated in figure 1-3.
Note that connectors PI and P2 have
their odd-numbered pins on the com-
ponent side of the board, whereas the
remaining connectors have them on the
solder side.
The abbreviation N/C in
the pin-connection lists means no con-
nection.
PI -
an 86-pin connector physically
(but
not electrically)
com-
patible to the Multibus and
i 5BC-80 formats.
It is used
only for power and ground, ex-
cept that pi n 14 can be used
for external initializing (re-
set) when jumpered for thi s
function (see figure 2-4). The
pi n connect ions are shown in
table 2-4.
2-4
P2 - a 60-pin connector physically
compatible with the Mu1tibus
and i 5BC-80 formats.
It car-
ries buffered signals from all
CPU lines except +5V, which is
on the PI connector, and DE-
COUPLE wh i ch is not used on
the AmZ8002. The address/data
bus from the CPU is demu1 t i-
p1exed into separate address
and data buses.
The CPU's
RE5ET*
line
is
connected
directly to the RST* 1ine on
P2, although RST* also resets
the
Am9551
USARTs
and
the
Am8255A PIO.
One additional
line, INH* is used to control
addressing
of
on/off-board
memory.
This connector is used to in-
terface a prototyping board
and/or external memory boards.
An
optional
backplane
is
available for this purpose.
If the CPU is disabled via the
BU5RQ* input, an off-board de-
vice can take control
over
most of the signal s on thi s
connector to access memory and
peripherals on the Evaluation
Board.
The pin connections
are shown in table 2-5.
P3 -
a 50-pin connector to the six
driver/terminator sockets of
the Am8255A parallel I/O cir-
cuit. The 24 active lines are
divided into three 8-bit ports
(addresses FFO, FFI and FF2,
where the upper four address
bits are not decoded).
Each
port can be programmed i nde-
pendently for input or output
to match the functions of the
driver or terminator ICs that
you
insert
in
sockets
U2
through U7.
Advertisement
Table of Contents
Need help?
Do you have a question about the Am96/4016 and is the answer not in the manual?