PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036 User's Guide
Data transfer
Power-up / reset state
Interrupts
Interrupts
Interrupt enable
ADC interrupt sources
(software programmable)
DAC interrupt sources
(software programmable)
Counters
User counter type
Number of channels
Resolution
Compatibility
CTRn base clock source
(software selectable)
Internal 10 MHz clock source stability
Counter n gate
Counter n output
Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width high
Gate width low
Input low voltage
Input high voltage
Output low voltage
Output high voltage
Programmed I/O
Input mode (high impedance)
PCI INTA# - mapped to IRQn via PCI BIOS at boot-time
Programmable through PLX9080
DAQ_ACTIVE: Interrupt is generated when a DAQ sequence is active.
DAQ_STOP:
Interrupt is generated when A/D Stop Trigger In is
detected.
DAQ_DONE:
Interrupt is generated when a DAQ sequence completes.
DAQ_FIFO_1/4_FULL: Interrupt is generated when ADC FIFO is ¼ full.
DAQ_SINGLE: Interrupt is generated after each conversion completes.
DAQ_EOSCAN: Interrupt is generated after the last channel is converted in
multi-channel scans.
DAQ_EOSEQ: Interrupt is generated after each interval delay during
multi-channel scans.
DAC_ACTIVE: Interrupt is generated when DAC waveform circuitry is
active.
DAC_DONE:
Interrupt is generated when a DAC sequence completes.
DAC_FIFO_1/4_EMPTY:
Interrupt is generated DAC FIFO is ¼ empty.
DAC_HIGH_CHANNEL:
Interrupt is generated when the DAC high channel output
is updated.
82C54
2
16-bits
5V/TTL
Internal 10 MHz, internal 100 KHz, or external connector (CTRn CLK)
50 ppm
Available at connector (CTRn GATE)
Available at connector (CTRn OUT)
10 MHz max
15 ns min
25 ns min
25 ns min
25 ns min
0.8 V max
2.0 V min
0.4 V max
3.0 V min
34
Specifications
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