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2.2 NVIDIA® Tegra™ 250
The NVIDIA Tegra 250 computer-on-a-chip is suited for handheld and mobile applications. It's primary purpose is to control all
system peripherals and provide computing power.
Table 1 Features (Available / Used on Tegra 200 Series Developer Board)
CPU
External Memory Support
Advanced Power Management
2D/3D acceleration
Connectivity and Expansion
Storage
Multimedia Support
For more information on Tegra 250, refer to the Tegra 200 Series Datasheet (Electrical, Mechanical and
Note:
Thermal Specifications and the Design Guide.
2.3 System DRAM
The Tegra 200 Series Developer Board has 8 DDR2 128M x 8 devices for 1GB total system DRAM. The DDR2 will operate up
to 333MHz for a peak bandwidth of 2.7GB/s. The memory is arranged as one or two 32-bit Ranks. Each Rank uses a different
Chip Select and Clock Enable. For low power operation with memory retention, self refresh is supported.
2.4 Boot Device
A 4Gb (512MB) Hynix HY27UF084G2BTPCB 8-bit NAND is available for use as the boot device. In addition, an internal 4-bit
SD, 8-bit MMC socket (J26) is provided to support other flash memories.
DG-04927-001_v01
Dual-core ARM® Cortex-A9 MPCore™ processor
32-bit 333MHz DDR2 SDRAM (to 1GB)
2 chip selects
Dynamic voltage and frequency scaling
Multiple clock and power domains
Independent gating of power domains
Integrated Open GLES 2.0 3D core
SPI (Qty 1), I2C (Qty 3), UART (Qty 2)
I2S/PCM (Qty 2)
ULPI HS
USB 2.0 HS (Qty 3)
SDIO (Qty 3)
Internal 4-bit SD/8-bit MMC
eMMC compatible module available
o
External 4-bit MMC/SD
Dual Display (Integrated LCD + external)
18-bit LVDS LCD
HDMI to 1080p and VGA
Camera (CSI)
Pre/Post Processing Acceleration with ISP
MPEG-4/H264/JPEG Encoder
Advance Information – Subject to Change
NVIDIA CONFIDENTIAL
Tegra 200 Series Developer Board User Guide
8
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