Power Supplies - Nvidia TEGRA DG-04927-001_V01 User Manual

Tegra 200 series

Table of Contents

4.1.2 Power Supplies

The Tegra 250 has 29 power rails (3 cores, 14 analog and 12 digital I/O). Depending on system design, many of the rails can

share a power supply, and some are not needed for all designs. The example shown in Table 4 is based on the Smartbook

Development System design and should be representative of these types of designs. This table mainly lists the supplies

required by the Tegra 250. Others are required to support some of the peripherals typically seen in a Smartbook.

Table 4 Tegra 250 Power Supply Allocation Example

Power Rails

VDD_RTC

VDD_CORE

VDD_CPU

AVDD_PLLx

VDDIO_SYS, AVDD_OSC

VDDIO_LCD,VDDIO_BB,VDDIO_AUDIO,VDDIO_UART

VDDIO_DDR

AVDD_USB, AVDD_USB_PLL

VDD_DDR_RX

VDDIO_NAND (if 3.3V), VDDIO_SDIO, VDDIO_VI

AVDD_VDAC

AVDD_HDMI

AVDD_HDMI_PLL

VDDIO_PEX_CLK

AVDD_DSI_CSI

AVDD_PCIE, AVDD_PEX, AVDD_PEX_PLL, VDD_PEX

VCORE_MMC

1: This includes pins AVDD_PLLA_C_P (powers PLLA, PLLC and PLLP), AVDD_PLLM, AVDD_PLLU (powers

Note:

PLLU and PLLD) and AVDD_PLLX. If PCIE not supported in a design, AVDD_PCIE should be left

unpowered as the leakage is significant.

2: Supplies must meet maximum rate requirement in AP20 EMT of 165mV/us

DG-04927-001_v01

Voltage (V)

Supported

(Tegra 200

Voltages (V)

Series DB)

1.0 – 1.2

Up to 1.2

1.0 – 1.2

Up to 1.2

0.9 – 1.0

Up to 1.0

1.1

1.8

1.8,2.8,3.3

1.8

3.3

2.8

1.8,2.8,3.3

3.3

2.7 – 3.3

2.85

3.3

1.8, 2.5

1.8

3.3

1.2

1.05

2.7 – 3.6

2.85

Advance Information – Subject to Change

NVIDIA CONFIDENTIAL

Tegra 200 Series Developer Board User Guide

Power Supply

Enable

PMU LDO2