Hdmi - Nvidia TEGRA DG-04927-001_V01 User Manual

4.6.2 HDMI

HDMI_RSET on the Tegra 250 is tied to ground through a 1KΩ, 1% resistor
DDC_SCL/SDA pins are 5V tolerant (no level shifter required). I2C pull-ups connect to 5V supply.
HP_DET drives HDMI_INT (interrupt pin) on the Tegra 250 (Also 5V tolerant - no level shifter required).
Figure 17: HDMI Connection Example
Table 11. HDMI Pinout
Signal
HDMI_TXCN
HDMI_TXCP
HDMI_TXD0N
HDMI_TXD0P
4.6.2.1 Unused Pins
Any unused signal lines can be left unconnected. If HDMI is not implemented, AVDD_HDMI/HDMI_PLL rails and all signal pins
can be left unconnected.
DG-04927-001_v01
Pin Signal
AF17 HDMI_TXD1N
AG17 HDMI_TXD1P
AE16 HDMI_TXD2N
AE17 HDMI_TXD2P
Advance Information – Subject to Change
NVIDIA CONFIDENTIAL
Tegra 200 Series Developer Board User Guide
Pin
AC18
AD18
AH18
AG18
29