Pioneer MEP-7000 Service Manual page 149

5
DAC_FPGA_DSP_DOUT
V+2R5FD
C323
0.01u
IC302
TC7SH08FUS1
5
INB
VCC
R372
4 INA
OUTY GND
0
3.0V
Level Shifter
144
143
R373
142
0
141
ATA1_D15
140
ATA1_DREQ
139
C317
138
VCCO_TOP3
0.01u
137
IO_L27N_0
136
GND15
C318
135
ATA1_DIOR
IO_L27P_0
134
VCCAUX4
C319 0.01u
133
VCCINT4
132
ATA1_RDY
IO_L30N_0
0.01u
131
ATA1_DACK
IO_L30P_0
130
IO_L31N_0
129
VREF_0
128
0/GCLK7
127
C320 ATA1_CS1
0/GCLK6
126
VCCO_TOP2
0.01u
16.9344MHz
125
1/GCLK5
0 R381
124
ATA1_CS3
1/GCLK4
123
ATA2_D7
VREF_1
122 C321
ATA2_D8
IO_L31P_1
121
VCCINT3
0.01u
C322
120
VCCAUX3
119
ATA2_D6
IO_L28N_1
0.01u
118
ATA2_D9
IO_L28P_1
117
GND14
116
ATA2_D5
IO2
115
VCCO_TOP1
C316
114
113 0.01u
ATA2_D10
112
ATA2_D4
111
110
109
A
1/5,3/5,4/5
LASH_FPGA_USB_I/O_DATA
E
CN104
5
6
A
5/5
1
FPRGM
2
3
29
2.5V
28
DGND
MUTEA#
A
5/5
MUTEB#
CNTA1
CNTA2
A
3/5
CNTB1
CNTB2
ATA1_WR
42
TRANSMISSION
B U F F E R
10
ATA1_A1
11
ATA1_A0
12
ATA1_A2
13
SD1_OUT
14
V+3R3D
A
1/5,2/5
SD2_OUT
KEY_DATA_N
BRDG_CS#_N
BRDG_FS_N
BRDG_CLK_N
V+2R5FD
V+2R5FD
2
A
FPGA_MCLK
A
CPU_FPGA
DGND
6
D
CN10
V+8ND
36
44 37
45
43
L301
DTL1176-A
7
8
4Y
GND
6
L302
9
4A
3Y
5 DTL1176-A
5Y
3A
4
5A
2Y
3
6Y
2A
2
6A
1Y
1
VCC
1A
IC303
TC74VHC04FTS1
C326
0.01u
DGND
DGND
2.5V
R E G
R386
0 D300
F300
NM
NM
1
!
3
N.C. STBY
4 3
GND
2
VOUT VIN
5 1
IC304
BH25FB1WG
5/5
1/5
(A)
: Ach Digital Audio Signal (LR)
(A)
: Ach Audio Data (LR)
MEP-7000
7
SMAIN ASSY (2/5)
A
2/5
(DWX2706)
CN301
CKS4187-A
V+8ND
41
40
C381 NM
NDGND
C382 NM
39
NDGND
DGND
C383 NM
38
C384 NM
C385 NM
R E C E I V E
V+3R3D
B U F F E R
C333 0.01u
IC306
TC74VHC04FTS1
R395
1 14
1A
VCC
22 2 13
1Y
6A
R396 3 12
2A
6Y
22
4 11
2Y
5A
5 10
3A
5Y
6 9
3Y
4A
7 8
GND
4Y
DGND
1.2V
R E G
NM
D301
IC305
BD00KA5WFP
V+3R3D
R385
!
F301
1
DGND
7
8
A
B
DGND
C
1:2H
A
1/5
CPU_BRDG_CS#_N
V+1R2FD
V+1R2FD
0
D
NM
2
3
GND
E
F
A
2/5
149
8