Gpctr0_Gate Signal - National Instruments NI 6115/6120 User Manual

Multifunction i/o devices for pci/pxi/compactpci bus computers
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Chapter 4
Connecting Signals
Figure 4-30 shows the timing requirements for GPCTR0_SOURCE.
t
p
t
t
w
w
t
= 50 ns minimum
p
t
= 10 ns minimum
w
Figure 4-30. GPCTR0_SOURCE Signal Timing
The maximum allowed frequency is 20 MHz, with a minimum pulse width
of 10 ns high or low. There is no minimum frequency limitation.
The 20 MHz or 100 kHz timebase normally generates GPCTR0_SOURCE
unless you select some external source.

GPCTR0_GATE Signal

Any PFI pin can receive as an input the GPCTR0_GATE signal, which is
available as an output on the PFI9/GPCTR0_GATE pin.
As an input, GPCTR0_GATE is configured in the edge-detection mode.
You can select any PFI pin as the source for GPCTR0_GATE and configure
the polarity selection for either rising or falling edge. You can use the gate
signal in a variety of applications to perform actions such as starting and
stopping the counter, generating interrupts, and saving the counter contents.
As an output, GPCTR0_GATE reflects the actual gate signal connected to
general-purpose counter 0, even if another PFI is externally generating the
gate. This output is set to high-impedance at startup.
© National Instruments Corporation
4-33
NI 6115/6120 User Manual

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