NI 6583R User Guide and Specifications The NI 6583R is a single-ended and differential signaling device designed to work in conjunction with your NI FlexRIO™ FPGA module. The NI 6583 is available in two versions: one with low-voltage differential signals (LVDS) and another with multipoint low-voltage differential signals (MLVDS). The term, differential, in this document refers to both LVDS and MLVDS signals unless otherwise specified.
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NI 6583R Figure 1. NI 6583R Note NI 6583R refers to the combination of your NI 6583 adapter module and your NI FlexRIO FPGA module. NI 6583 refers only to your NI 6583 adapter module. NI 6583R User Guide and Specifications...
Connections that exceed any of the maximum ratings of input or output signals on the NI 6583R can damage the device and the chassis. NI is not liable for any damage resulting from such signal connections. For the maximum input and output ratings for each signal, refer to the section of this document.
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34, 37, 40, 43, 46, 49, 52, 55, 58, 61, 64, 67, 70, 73 RESERVED 11, 12, 68, 69, 71, — These terminals are reserved for future use. Do not connect to these pins. NI 6583R User Guide and Specifications ni.com...
Block Diagrams Figures 4 through 7 show the data flow through the NI 6583R. Single-ended data lines use standardized voltage levels to interpret data as either a binary zero or a one in high-speed digital data transfers. Differential data lines provide a low-noise, low-power, low-amplitude differential method for high-speed digital data transfer.
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(GPIO Output) Output Enable from NI FlexRIO FPGA Module (GPIO Direction) DDC B CLK OUT Clock from 100 Ω NI FlexRIO FPGA Module DDC B CLK OUT (GPIO Output) Figure 7. Clock Output Signals NI 6583R User Guide and Specifications ni.com...
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(as enable) Note For the DIO and PFI lines, drive the GPIO Direction high for output and low for input. For CLK OUT, drive the GPIO Direction high for enable and low for disable. NI 6583R User Guide and Specifications ni.com...
NI 6583R using a shielded cable. If unshielded cables or accessories are not properly installed and shielded, the EMC specifications for the NI 6583R are no longer guaranteed.
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NI SMB-2163, respectively, using the NI SHC68-C68-D4 cable. NI PXI-1042 NI PXI-6551 50 MHz Digital I/O ACCESS ACTIVE PXI/PXI Express Chassis with NI 6583R NI CB-2162 Accessory NI SHC68-C68-D4 Cable Figure 8. Connecting the NI CB-2162 Accessory NI PXI-1042 NI PXI-6551...
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The following figure shows the single-ended digital flying lead cable. Lead Pairs Removable Sleeving 68-Pin DDC A Connector Figure 10. Single-Ended Flying Lead Cable Parts Locator Diagram NI 6583R User Guide and Specifications ni.com...
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SHB12X-B12X shielded cable (192344-01), the NI 6583 pinout is reversed at the end connector. For example, the signal shown on pin 1 maps to pin 73 at the end connector. Refer to Front Panel and Connector Pinouts section in this document for more pinout information. NI 6583R User Guide and Specifications ni.com...
LabVIEW FPGA program. This section demonstrates how to use an existing LabVIEW FPGA example project to generate and acquire samples with the NI 6583R. This example requires the NI SHC68-C68-D4 and the NI SHB12X-B12X shielded cables and the appropriate accessories for your device.
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Constant, and DDC A Voltage Level controls. Click the Run button to run the VI. The NI 6583R generates a waveform on the even channels of your device and then acquires that waveform on the odd channels of your device. The front panel of the host VI displays both the generated and acquired waveforms, as shown in Figure 13.
This section demonstrates how to create a LabVIEW project, an FPGA VI, and a host VI that acquires and generates single-ended data on the NI 6583R. This exercise also demonstrates how to compile the FPGA VI on your target and run a VI on the host machine.
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The LabVIEW FPGA Compile Server window opens and runs. The compilation takes several minutes. 24. When the compilation finishes, click the Stop Server button. 25. Click OK in the Successful Compile Report window. Close the VI without saving changes. NI 6583R User Guide and Specifications ni.com...
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Click the Stop button on the front panel and close the VI. Table 6. IO Module\Set Voltage Control IO Module\Set Voltage Control I/O Voltage 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V NI 6583R User Guide and Specifications ni.com...
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NI 6583 and to your system. Refer to the NI FlexRIO Help for more information about NI FlexRIO CLIP items, configuring the NI 6583 with a socketed CLIP, and a list of available socketed CLIP signals. NI 6583R User Guide and Specifications ni.com...
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LVDS Channels (DDC B) (Consistent with TI part number SN65LVDM180) Number of programmable I/O voltage levels ..None Power-up state............Drivers disabled, 100 Ω differential impedance with 300 kΩ to 3.3 V Typical data rate.............300 Mb/s NI 6583R User Guide and Specifications ni.com...
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Relative humidity range .........5% to 95%, noncondensing. Tested in accordance with IEC 60068-2-56. Note Clean the device with a soft, non-metallic brush. Make sure that the device is completely dry and free from contaminants before returning it to service. NI 6583R User Guide and Specifications ni.com...
National Instruments corporate headquarters is located at 11500 North Mopac Expressway, Austin, Texas, 78759-3504. National Instruments also has offices located around the world to help address your support needs. For telephone support in the United States, create your service request at ni.com/ support and follow the calling instructions or dial 512 795 8248.
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For patents covering National Instruments products/technology, refer to the appropriate location: Help»Patents in your software, the patents.txt file on your media, or the National Instruments Patent Notice at ni.com/patents. Refer to the Export Compliance Information at ni.com/legal/ export-compliance for the National Instruments global trade compliance policy.
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