National Instruments NI 6115/6120 User Manual page 29

Chapter 3 Hardware Overview
Analog
Input
CH0
Analog
Input
CH1
Analog
Input
CH2
Analog
Input
CH3
NI 6115/6120 User Manual
ADC
+
PGIA
–
ADC
+
PGIA
–
ADC
+
PGIA
–
ADC
+
PGIA
AC Couple
–
PFI0/TRIG1
Figure 3-3. Analog Trigger Block Diagram for the NI 6115/6120
In below-low-level analog triggering mode, the trigger is generated when
the signal value is less than lowValue, as shown in Figure 3-4. HighValue
is unused.
lowValue
Trigger
Figure 3-4. Below-Low-Level Analog Triggering Mode
In above-high-level analog triggering mode, the trigger is generated when
the signal value is greater than highValue, as shown in Figure 3-5.
LowValue is unused.
Digital Data
highValue
Analog
Mux Trigger
Circuit
10 k
lowValue
3-6
Trigger
DAC
DAQ-STC
Trigger
DAC
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