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National Instruments NI 6115 User Manual

Multifunction i/o devices for pci/pxi/compactpci bus computers
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NI 6115/6120 User Manual
Multifunction I/O Devices for
PCI/PXI/CompactPCI Bus Computers
NI 6115/6120 User Manual
August 2002 Edition
Part Number 322812B-01

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Summary of Contents for National Instruments NI 6115

  • Page 1 NI 6115/6120 User Manual Multifunction I/O Devices for PCI/PXI/CompactPCI Bus Computers NI 6115/6120 User Manual August 2002 Edition Part Number 322812B-01...
  • Page 2 Switzerland 056 200 51 51, Taiwan 02 2528 7227, United Kingdom 01635 523545 For further support information, see the Technical Support and Professional Services appendix. To comment on the documentation, send email to techpubs@ni.com. © 2001–2002 National Instruments Corporation. All rights reserved.

  • Page 3: Important Information

    The reader should consult National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it.
  • Page 4 Classification requirements are the same for the Federal Communications Commission (FCC) and the Canadian Department of Communications (DOC). Changes or modifications not expressly approved by National Instruments could void the user’s authority to operate the equipment under the FCC Rules.
  • Page 5 Canadian Department of Communications This Class B digital apparatus meets all requirements of the Canadian Interference-Causing Equipment Regulations. Cet appareil numérique de la classe B respecte toutes les exigences du Règlement sur le matériel brouilleur du Canada. Compliance to EU Directives Readers in the European Union (EU) must refer to the Manufacturer’s Declaration of Conformity (DoC) for information* pertaining to the CE Mark compliance scheme.

  • Page 6: Table Of Contents

    National Instruments ADE Software...1-5 Optional Equipment ...1-6 Custom Cabling ...1-6 Unpacking ...1-7 Safety Information ...1-8 Chapter 2 Installing and Configuring the NI 6115/6120 Installing the Software ...2-1 Installing the Hardware...2-1 Configuring the Device...2-3 Chapter 3 Hardware Overview Analog Input ...3-2 Input Mode ...3-2...
  • Page 7 UPDATE* Signal ... 4-30 UISOURCE Signal ... 4-31 General-Purpose Timing Signal Connections... 4-32 GPCTR0_SOURCE Signal ... 4-32 GPCTR0_GATE Signal ... 4-33 GPCTR0_OUT Signal ... 4-34 GPCTR0_UP_DOWN Signal... 4-35 GPCTR1_SOURCE Signal ... 4-35 GPCTR1_GATE Signal ... 4-36 NI 6115/6120 User Manual viii ni.com...

  • Page 8: Specifications

    Field Wiring Considerations ...4-39 Chapter 5 Calibration Loading Stored Calibration Constants ...5-1 Self-Calibration...5-2 External Calibration ...5-2 Appendix A Specifications Appendix B Common Questions Appendix C Technical Support and Professional Services Glossary Index © National Instruments Corporation Contents NI 6115/6120 User Manual...

  • Page 9: About This Manual

    • • • The NI 6115/6120 is a high-performance multifunction analog, digital, and timing I/O data acquisition (DAQ) device for PXI and PCI bus computers. Supported functions include analog input (AI), analog output (AO), digital I/O (DIO), and timing I/O (TIO).

  • Page 10: National Instruments Documentation

    PXI bus Systems Alliance. National Instruments Documentation The NI 6115/6120 User Manual is one piece of the documentation set for the DAQ system. You could have any of several types of documentation depending on the hardware and software in the system. Use the documentation you have as follows: •...

  • Page 11: Related Documentation

    NI-DAQ Function Reference Help. You can access this help file by clicking Start»Programs»National Instruments»NI-DAQ» NI-DAQ Help. PCI Local Bus Specification Revision 2.2 PICMG 2.0 R3.0, CompactPCI Core Specification PXI Specification Revision 2.0, available from xiii About This Manual ni.com/manuals ni.com/manuals ni.com/zone www.pxisa.org NI 6115/6120 User Manual...

  • Page 12: Introduction

    TTL-compatible correlated DIO, and two 24-bit counter/timers for TIO. The NI 6115/6120 is a DAQ device for PXI or the PCI bus. The device is software configured and calibrated, and completely switchless and jumperless. This feature is made possible by the NI MITE bus interface chip that connects the device to the PXI or PCI I/O bus.

  • Page 13: Using Pxi With Compactpci

    PLL synchronization by allowing these devices to all lock to the same reference clock present on the PXI backplane. Refer to for more information. Detailed specifications of the NI 6115/6120 are in Appendix A, Specifications. Using PXI with CompactPCI The ability to use PXI-compatible products with standard CompactPCI products is an important feature of PXI Specification Revision 2.0.

  • Page 14: What You Need To Get Started

    NI PXI-6115/6120 Signal RTSI<0..5> RTSI 6 RTSI Clock Reserved Reserved What You Need to Get Started To set up and use the NI 6115/6120, you need the following: ❑ ❑ ❑ ❑ ❑ © National Instruments Corporation Table 1-1. NI PXI-6115/6120 J2 Pin Assignment PXI Pin Name PXI Trigger<0..5>...

  • Page 15: Software Programming Choices

    NI application development environment (ADE) or other ADEs. In either case, you use NI-DAQ. NI-DAQ NI-DAQ, which shipped with the NI 6115/6120, has an extensive library of functions that you can call from the ADE. These functions allow you to use all the features of the device.

  • Page 16: National Instruments Ade Software

    Measurement Studio, which includes tools for Visual C++ and tools for Visual Basic, is a development suite that allows you to design test and measurement applications. For Visual Basic developers, Measurement Studio features a set of ActiveX controls for using National Instruments © National Instruments Corporation Conventional...

  • Page 17: Optional Equipment

    Using LabVIEW, LabWindows/CVI, Measurement Studio, or VI Logger greatly reduces the development time for your data acquisition and control application. Optional Equipment NI offers a variety of products to use with the NI 6115/6120, including cables, connector blocks, and other accessories, as follows: • •...

  • Page 18: Unpacking

    Notify NI if the device appears damaged in any way. Do not install a damaged device into the computer. Store the NI 6115/6120 in the antistatic envelope when not in use. © National Instruments Corporation Route the analog lines separately from the digital lines.

  • Page 19: Safety Information

    Misuse of the product can result in a hazard. You can compromise the safety protection built into the product if the product is damaged in any way. If the product is damaged, return it to National Instruments for repair. Do not substitute parts or modify the product except as described in this document.
  • Page 20 (<1,000 V) installation. Examples of Installation Category IV are electric meters, and measurements on primary overcurrent protection devices and ripple-control units. Chapter 1 Introduction . This category is a signal level such as NI 6115/6120 User Manual...
  • Page 21 Chapter 1 Introduction Below is a diagram of a sample installation. NI 6115/6120 User Manual 1-10 ni.com...

  • Page 22: Installing And Configuring The Ni 6115/6120

    Before you install the NI 6115/6120, complete the following steps to install the software: Note It is important to install NI-DAQ before installing the NI 6115/6120 to ensure that the device is properly detected. Installing the Hardware You can install the NI 6115/6120 in any available expansion slot in the computer.

  • Page 23: Chapter 2 Installing And Configuring The Ni

    Chapter 2 Installing and Configuring the NI 6115/6120 Note The PXI specification requires all slots to support bus master devices, but the CompactPCI specification does not. If you install in a CompactPCI non-master slot, you must disable the onboard DMA controller using software.

  • Page 24: Configuring The Device

    Because of the NI standard architecture for data acquisition and the PCI bus specification, the NI 6115/6120 is completely software-configurable. Two types of configuration are performed on the NI 6115/6120: bus-related and data acquisition-related configuration. The NI PCI-6115/6120 is fully compatible with the industry-standard PCI Local Bus Specification Revision 2.2.

  • Page 25: Hardware Overview

    Hardware Overview This chapter presents an overview of the hardware functions on the NI 6115/6120. Figures 3-1 and 3-2 provide block diagrams for the NI 6115 and NI 6120, respectively. CH0+ AI CH0 Amplifier CH0– – CH1+ AI CH1 Amplifier CH1–...

  • Page 26: Analog Input

    Analog Input The following sections describe in detail each AI category. Input Mode The NI 6115/6120 supports only differential (DIFF) input mode. For more information about DIFF input, refer to the Signals showing the signal paths for DIFF input mode.

  • Page 27: Input Polarity And Input Range

    The NI 6115/6120 is not designed for input voltages greater than ±42 VDC. Input voltages greater than ±42 VDC can damage the NI 6115/6120, any device connected to it, and the host computer. Overvoltage can also cause an electric shock hazard for the operator.

  • Page 28: Considerations For Selecting Input Ranges

    Input Coupling You can configure the NI 6115/6120 for either AC or DC input coupling on a per channel basis. Use AC coupling when the AC signal contains a large DC component. If you enable AC coupling, you remove the large DC offset for the input amplifier and amplify only the AC component.

  • Page 29: Analog Output

    Figure 3-3. The trigger-level range for the direct analog channel is ±10 V with a resolution of 78 mV for the NI 6115 and 4.88 mV for the NI 6120. The input impedance for the direct analog channel is 10 kΩ.
  • Page 30 Figure 3-5. LowValue is unused. NI 6115/6120 User Manual Digital Data AC Couple 10 k Figure 3-3. Analog Trigger Block Diagram for the NI 6115/6120 lowValue Trigger Figure 3-4. Below-Low-Level Analog Triggering Mode highValue Trigger...
  • Page 31 In high-hysteresis analog triggering mode, the trigger is generated when the signal value is greater than highValue, with the hysteresis specified by lowValue, as Figure 3-7 shows. highValue lowValue Trigger Figure 3-7. High-Hysteresis Analog Triggering Mode © National Instruments Corporation NI 6115/6120 User Manual...

  • Page 32: Antialiasing Filters

    Antialiasing Filters Each AI channel on the NI 6115/6120 is equipped with a programmable antialaising Bessel filter. On the NI 6115, you can program the filters to provide a third-order 50 kHz lowpass filter, a third-order 500 kHz lowpass filter, or a pass-through mode with no filtering. On the NI 6120, you can program the filters to provide a five-pole 100 kHz low-pass filter or pass-through.

  • Page 33: Phase-Locked Loop Circuit

    NI PXI-6115/6120. Note This feature is not available on the NI PCI-6115/6120. The PLL circuit is automatically enabled when the NI 6115/6120 is powered up. No configuration steps are required in order to utilize PLL synchronization. © National Instruments Corporation...

  • Page 34: Correlated Digital I/O

    Timing Signal Routing The DAQ-STC provides a flexible interface for connecting timing signals to other devices or external circuitry. The NI 6115/6120 uses the RTSI bus to interconnect timing signals between devices, and it uses the programmable function input (PFI) pins on the I/O connector to connect the device to external circuitry.
  • Page 35 Many of these timing signals are also available as outputs on the RTSI pins, as indicated in the RTSI Triggers section later in this chapter, and on the PFI pins, as indicated in Chapter 4, Connecting Signals. © National Instruments Corporation 3-11 NI 6115/6120 User Manual...

  • Page 36: Programmable Function Inputs

    A/D conversions, updates, or general-purpose signals at the I/O connector. The NI 6115/6120 can use either its internal 20 MHz timebase or a timebase received over the RTSI bus. In addition, if you configure the...
  • Page 37 Trigger <0..5>, respectively, through the NI PXI-6115/6120 backplane. In PXI, RTSI<6> connects to the PXI Star Trigger line, allowing the NI 6115/6120 to receive triggers from any Star Trigger controller plugged into slot 2 of the chassis. For more information on the Star Trigger, refer to the PXI Specification Revision 2.0.
  • Page 38 Chapter 3 Hardware Overview Refer to the Signals, for a description of the signals shown in Figures 3-12 and 3-13. NI 6115/6120 User Manual PXI Star (6) PXI Trigger (0..5) PXI Trigger (7) Switch Figure 3-13. PXI RTSI Bus Signal Connections...

  • Page 39: Connecting Signals

    Connections that exceed any of the maximum ratings of input or output signals on the NI 6115/6120 can damage the device and the computer. NI is not liable for any damage resulting from such signal connections. The Protection column of Tables 4-3, 4-4, and 4-5 show the maximum input ratings for each signal.
  • Page 40 DGND PFI0/TRIG1 PFI1/TRIG2 DGND +5V OUTPUT DGND PFI5/UPDATE* PFI6/WFTRIG DGND PFI9/GPCTR0_GATE GPCTR0_OUT FREQ_OUT NC = No Connect Figure 4-1. I/O Connector Pin Assignment for the NI 6115/6120 ACH0+ ACH0GND ACH1– ACH2+ ACH2GND ACH3– AOGND AOGND DGND DIO0 DIO5 DGND DIO2...

  • Page 41: I/O Connector Signal Descriptions

    DGND Output External Strobe—This output can be toggled under software control to latch signals or trigger events on external devices. Chapter 4 Connecting Signals Description NI 6115/6120 User Manual...
  • Page 42 PFI1/TRIG2 PFI2/CONVERT* PFI3/GPCTR1_SOURCE PFI4/GPCTR1_GATE GPCTR1_OUT PFI5/UPDATE* PFI6/WFTRIG PFI7/STARTSCAN NI 6115/6120 User Manual Direction DGND Input PFI0/Trigger 1—As an input, this is either a PFI or the Output source for the hardware analog trigger. PFI signals are explained in the later in this chapter. The hardware analog trigger is...
  • Page 43 Signal Name Reference PFI8/GPCTR0_SOURCE PFI9/GPCTR0_GATE GPCTR0_OUT FREQ_OUT The GPCTR0_OUT acts as an input when using external clock mode with correlated DIO. Table 4-3. Analog I/O Signal Summary for the NI 6115 Signal Type and Signal Name Direction ACH<0..3>+ ACH<0..3>– DAC0OUT DAC1OUT Applies to range ≤...
  • Page 44 10 V, impedance refers to ACH<0..3>–. Signal Type and Signal Name Direction DIO<0..7> SCANCLK EXTSTROBE* PFI0/TRIG1 PFI1/TRIG2 PFI2/CONVERT* NI 6115/6120 User Manual Impedance Protection Input/ (Volts) Output On/Off 100 GΩ ±42 V to to GND 100 GΩ ±42 V to to GND 1 MΩ...

  • Page 45: Types Of Signal Sources

    5 at 0.4 50 kΩ –0.4) 5 at 0.4 50 kΩ –0.4) 5 at 0.4 50 kΩ –0.4) 5 at 0.4 50 kΩ –0.4) 5 at 0.4 50 kΩ –0.4) 5 at 0.4 50 kΩ –0.4) NI 6115/6120 User Manual...

  • Page 46: Ground-Referenced Signal Sources

    Connecting Signals source. You must tie the ground reference of a floating signal to the NI 6115/6120 AI ground to establish a local or onboard reference for the signal. Otherwise, the measured input signal varies as the source floats out of the common-mode input range.

  • Page 47: Connections For Ground-Referenced Signal Sources

    Connections for Ground-Referenced Signal Sources Figures 4-2 and 4-3 show how to connect a ground-referenced signal source to a channel on the NI 6115 and NI 6120, respectively. Common-Mode ACH0+ Ground- Referenced Signal – Source ACH0– Common- Mode Noise and Ground –...
  • Page 48 With this type of connection, the PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground, shown as V NI 6115/6120 User Manual AC Coupling 100 pF* 1 M*...

  • Page 49: Connections For Nonreferenced Or Floating Signal Sources

    Bias Current Return Paths Bias Resistor (see text) ACH0GND I/O Connector Figure 4-4. Differential Input Connections on the NI 6115 for Nonreferenced Signals © National Instruments Corporation AC Coupling Common-Mode Choke 100 pf ACH0 Connections Shown 4-11 Chapter 4 Connecting Signals...

  • Page 50: Common-Mode Signal Rejection Considerations

    Common-Mode Signal Rejection Considerations Figures 4-2 and 4-3 show connections for signal sources that are already referenced to some ground point with respect to the NI 6115/6120. In theory, the PGIA can reject any voltage caused by ground-potential differences between the signal source and the device. In addition, with pseudodifferential input connections, the PGIA can reject common-mode noise pickup in the leads connecting the signal sources to the device.

  • Page 51: Working Voltage Range

    NI 6115 The purpose of the 10 nF capacitance on the ACH<0..3>– connection of the NI 6115 is to provide an impedance for this choke to work against at high frequency, thus improving the high-frequency CMRR. Depending on your application and the type of common noise at your source, further common-noise rejection might be gained by placing a 0.1 µF ceramic...

  • Page 52: Connecting Analog Output Signals

    DAC0OUT is the voltage output signal for AO channel 0. DAC1OUT is the voltage output signal for AO channel 1. AOGND is the ground-reference signal for the AO channels. AOGND is a hard ground. Figure 4-6 shows how to connect AO signals to the NI 6115/6120. Load VOUT 0 VOUT 1...

  • Page 53: Connecting Digital I/O Signals

    Caution Exceeding the maximum input voltage ratings, which are listed in Table 4-3, can damage the NI 6115/6120 and the computer. NI is not liable for any damage resulting from such signal connections. Figure 4-7 shows signal connections for three typical DIO applications.

  • Page 54: Correlating Dio Signal Connections

    LED shown in Figure 4-7. Correlating DIO Signal Connections You can correlate DIO and AI/AO operations to the same clock on the NI 6115/6120. You can use any of the following signals as the clock source: • •...
  • Page 55 Figure 4-8. Clock Signal Driving DI and DO Signals Figure 4-9 shows a DIO operation driven by the AO Update signal on its rising edge. AO Update Figure 4-9. Rising-Edge AO Update Signal Driving a DIO Signal © National Instruments Corporation 4-17 NI 6115/6120 User Manual...

  • Page 56: Power Connections

    Under no circumstances should you connect these +5 V power pins directly to analog or digital ground or to any other voltage source on the NI 6115/6120 or any other device. Doing so can damage the NI 6115/6120 and the computer. NI is not liable for damage resulting from such connections.
  • Page 57 Source © National Instruments Corporation DAQ Timing Connections Waveform Generation Timing Connections PFI0/TRIG1 PFI7/STARTSCAN I/O Connector Figure 4-11. Timing I/O Connections 4-19 Chapter 4 Connecting Signals section section section later in this chapter DGND NI 6115/6120 NI 6115/6120 User Manual...

  • Page 58: Programmable Function Input Connections

    Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received. A typical posttriggered DAQ sequence is shown in Figure 4-12. Note On the NI 6115/6120, each STARTSCAN pulse initiates one CONVERT* pulse, which simultaneously samples all channels. NI 6115/6120 User Manual 4-20...

  • Page 59: Trig1 Signal

    PFI pin as the source for TRIG1 and configure the polarity selection for either rising or falling edge. The selected edge of TRIG1 starts the DAQ sequence for both posttriggered and pretriggered acquisitions. The NI 6115/6120 supports analog triggering on the PFI0/TRIG1 pin. © National Instruments Corporation TRIG1 CONVERT* Figure 4-12.

  • Page 60: Trig2 Signal

    TRIG2 to the DAQ sequence. As an input, TRIG2 is configured in the edge-detection mode. You can select any PFI pin as the source for TRIG2 and configure the polarity NI 6115/6120 User Manual Hardware Overview, for more information on analog...
  • Page 61 Figures 4-16 and 4-17 show the timing requirements for TRIG2. © National Instruments Corporation Rising-Edge Polarity Falling-Edge Polarity Figure 4-16. TRIG2 Input Signal Timing = 25 – 50 ns Figure 4-17. TRIG2 Output Signal Timing 4-23 Chapter 4 Connecting Signals = 10 ns minimum NI 6115/6120 User Manual...

  • Page 62: Startscan Signal

    STARTSCAN is deasserted t last conversion in the scan is initiated. This output is set to high-impedance at startup. Figures 4-18 and 4-19 show the timing requirements for STARTSCAN. NI 6115/6120 User Manual Rising-Edge Polarity Falling-Edge Polarity Figure 4-18.
  • Page 63 STARTSCAN generates a conversion. STARTSCAN pulses should be separated by at least one scan period. A counter on the NI 6115/6120 internally generates STARTSCAN unless you select some external source. This counter is started by the TRIG1 signal and is stopped by either software or the sample counter.

  • Page 64: Convert* Signal

    The output is an active low pulse with a pulse width of 50 to 100 ns. This output is set to high-impedance at startup. Figures 4-20 and 4-21 show the input and output timing requirements for CONVERT*. NI 6115/6120 User Manual Rising-Edge Polarity Falling-Edge Polarity Figure 4-20.

  • Page 65: Aigate Signal

    The sample interval counter on the NI 6115/6120 device normally generates CONVERT* unless you select some external source. The counter is started by the STARTSCAN signal and continues to count down and reload itself until the scan is finished.

  • Page 66: Scanclk Signal

    This signal has a 450 ns pulse width and is software enabled. When using NI-DAQ, SCANCLK polarity is low-to-high and cannot be changed Note programmatically. Figure 4-23 shows the timing for SCANCLK. NI 6115/6120 User Manual = 50 ns minimum = 23 ns minimum Figure 4-22. SISOURCE Signal Timing CONVERT*...

  • Page 67: Extstrobe* Signal

    Figure 4-24 shows the timing for the hardware-strobe mode EXTSTROBE* signal. Waveform Generation Timing Connections The AO group defined for the NI 6115/6120 is controlled by WFTRIG, UPDATE*, and UISOURCE. WFTRIG Signal Any PFI pin can receive as an input the WFTRIG signal, which is available as an output on the PFI6/WFTRIG pin.

  • Page 68: Update* Signal

    DACs, even if another PFI is externally generating the updates. The output is an active low pulse with a pulse width of 50 to 75 ns. This output is set to high-impedance at startup. NI 6115/6120 User Manual Rising-Edge Polarity...

  • Page 69: Uisource Signal

    UPDATE* pulses with enough time that new data can be written to the DAC latches. The UI counter for the NI 6115/6120 normally generates UPDATE* unless you select some external source. The UI counter is started by the WFTRIG signal and can be stopped by software or the internal buffer counter (BC).

  • Page 70: General-Purpose Timing Signal Connections

    As an output, GPCTR0_SOURCE reflects the actual clock connected to general-purpose counter 0, even if another PFI is externally inputting the source clock. This output is set to high-impedance at startup. NI 6115/6120 User Manual = 50 ns minimum = 10 ns minimum Figure 4-29.

  • Page 71: Gpctr0_Gate Signal

    As an output, GPCTR0_GATE reflects the actual gate signal connected to general-purpose counter 0, even if another PFI is externally generating the gate. This output is set to high-impedance at startup. © National Instruments Corporation 4-33 NI 6115/6120 User Manual...

  • Page 72: Gpctr0_Out Signal

    When using external clocking mode with correlated DIO, this pin is used as an input Note for the external clock. GPCTR0_SOURCE GPCTR0_OUT (Pulse on TC) GPCTR0_OUT (Toggle output on TC) NI 6115/6120 User Manual Rising-Edge Polarity Falling-Edge Polarity Figure 4-31. GPCTR0_GATE Signal Timing in Edge-Detection Mode Figure 4-32. GPCTR0_OUT Signal Timing 4-34 = 10 ns minimum ni.com...

  • Page 73: Gpctr0_Up_Down Signal

    The maximum allowed frequency is 20 MHz, with a minimum pulse width of 10 ns high or low. There is no minimum frequency limitation. The 20 MHz or 100 kHz timebase normally generates GPCTR1_SOURCE unless you select some external source. © National Instruments Corporation 4-35 NI 6115/6120 User Manual...

  • Page 74: Gpctr1_Gate Signal

    1. You have two software-selectable output options: pulse on TC and toggle output polarity on TC. The output polarity is software-selectable for both options. This output is set to high-impedance at startup. NI 6115/6120 User Manual Rising-Edge Polarity Falling-Edge Polarity Figure 4-34.

  • Page 75: Gpctr1_Up_Down Signal

    Gate Hold Time Gate Pulse Width Output Delay Time Figure 4-36. GPCTR Timing Summary 4-37 Chapter 4 Connecting Signals 50 ns minimum 23 ns minimum 10 ns minimum 0 ns minimum 10 ns minimum 80 ns maximum NI 6115/6120 User Manual...

  • Page 76: Freq_Out Signal

    SOURCE input or to one of the internally generated signals on the NI 6115/6120. Figure 4-36 shows the GATE signal referenced to the rising edge of a source signal. The gate must be valid (either high or low) for at...

  • Page 77: Field Wiring Considerations

    Separate the NI 6115/6120 signal lines from high-current or high-voltage lines. These lines can induce currents in or voltages on the NI 6115/6120 signal lines if they run in parallel paths at a close distance. To reduce the magnetic coupling between lines, separate them by a reasonable distance if they run in parallel, or run the lines at right angles to each other.

  • Page 78: Calibration

    NI-DAQ includes calibration functions for performing all of the steps in the calibration process. Calibration refers to the process of minimizing measurement and output voltage errors by making small circuit adjustments. On the NI 6115/6120, these adjustments take the form of writing values to onboard calibration DACs (CalDACs).

  • Page 79: Self-Calibration

    It is better to self-calibrate when the device is installed in the environment in which it is used. Self-Calibration The NI 6115/6120 can measure and correct for almost all of its calibration-related errors without any external signal connections. NI-DAQ software provides a self-calibration method. This self-calibration process, which generally takes two to five minutes, is the preferred method of assuring accuracy in your application.
  • Page 80 To externally calibrate your device, be sure to use a very accurate external reference. The reference should be several times more accurate than the device itself. For a detailed calibration procedure for the NI 6115/6120, click Manual Calibration Procedures at ni.com/calibration ©...

  • Page 81: Input Characteristics

    Specifications This appendix lists the specifications of the NI 6115/6120. These specifications are typical at 25 °C unless otherwise noted. Analog Input Input Characteristics Number of channels ... 4 pseudodifferential Type of ADC Sampling rate Input impedance © National Instruments Corporation Resolution NI 6115 ...

  • Page 82: Appendix A Specifications

    NI 6120...100 GΩ Positive input (ACH+)...±11 V for ranges < ±10 V; Negative input (ACH–) ...±2.5 V NI 6115...±0.35 LSB typ, ±1 LSB max NI 6120...2.5 LSB max NI 6115...±0.25 LSB typ, ±1 LSB max NI 6120...0.75 LSB typ, no missing codes NI 6115...Refer to Table A-1...
  • Page 83 Table A-1. NI 6115 Analog Input DC Accuracy Information Nominal Range % of Reading Full Scale 24 Hours 1 Year ±50 0.346 0.348 ±20 0.271 0.273 ±10 0.026 0.028 ±5 0.016 0.018 ±2 0.036 0.038 ±1 0.043 0.045 ±0.5 0.058 0.060...
  • Page 84 Appendix A Specifications Dynamic Characteristics Interchannel skew ...1 ns typ Analog filters Crosstalk ...–80 dB, DC to 100 kHz Table A-3. NI 6115 Analog Input Dynamic Characteristics Bandwidth Input Range (MHz) ±50 V ±20 V ±10 V ±5 V ±2 V ±1 V...
  • Page 85 Measured at 100 kHz with twelfth-order bandpass filter after signal source 100% production tested at 100 kHz DC to 60 Hz , not including quantization © National Instruments Corporation SFDR Typ SFDR Max (dB) (dB) Appendix A Specifications CMRR System Noise (dB) (LSB NI 6115/6120 User Manual...
  • Page 86 Appendix A Specifications NI 6115/6120 User Manual Full-Scale (–0.3 dB) Input Amplitude ±10 V ±5 V ±2 V ±1 V ±0.5 V ±0.2 V Frequency (MHz) Figure A-1. NI 6115 Total Harmonic Distortion Plus Noise (THD + N) 10.0 ni.com...
  • Page 87 ± 0.2 V © National Instruments Corporation Full-Scale (–0.3 dB) Input Amplitude ± 2 V ± 0.5 V ± 10 V Frequency (kHz) Figure A-2. NI 6120 Total Harmonic Distortion Plus Noise (THD + N) Appendix A Specifications NI 6115/6120 User Manual...
  • Page 88 Appendix A Specifications NI 6115/6120 User Manual High-Voltage Ranges, only ±10 V Input Amplitude ±50 V ±20 V Frequency (MHz) Figure A-3. NI 6115 High-Voltage THD + N 10.0 ni.com...
  • Page 89 ± 50 V ± 20 V 83.5 83.0 82.5 82.0 81.5 81.0 80.5 80.0 © National Instruments Corporation High-Voltage Ranges, only ±10 V Input Amplitude Frequency (kHz) Figure A-4. NI 6120 High-Voltage THD + N Appendix A Specifications NI 6115/6120 User Manual...
  • Page 90 Appendix A Specifications 71.6 70.4 69.2 66.8 65.6 64.4 63.2 NI 6115/6120 User Manual With Filters, Full-Scale Input for Range of ±1 V 50 kHz 500 kHz Frequency (kHz) Figure A-5. NI 6115 THD + N with Filters A-10 1000 ni.com...
  • Page 91 With Filters, Full-Scale Input for Range of ±1 V Frequency (kHz) Figure A-6. NI 6120 THD + N with Filters Pregain NI 6115 ... ±12 µV/°C NI 6120 ... ±1.5 µV/°C Postgain NI 6115 ... ±64 µV/°C NI 6120 ... ±2.1 LSB/°C NI 6115 ...

  • Page 92: Output Characteristics

    NI 6120...16 bits, 1 in 65,536 1 channel...4 MS/s, system dependent 2 channel...2.5 MS/s, system dependent NI 6115...±0.5 LSB typ, ±2 LSB max NI 6120...±0.35 LSB typ, ±1 LSB max NI 6115...±0.25 LSB typ, ±1 LSB max NI 6120...±0.2 LSB typ, ±1 LSB max NI 6115...Refer to Table A-5...

  • Page 93: Voltage Output

    Table A-5. NI 6115 Analog Output DC Accuracy Information Nominal Range at % of Reading Full Scale 24 Hrs 90 Days ±10 0.0437 0.0445 Table A-6. NI 6120 Analog Output DC Accuracy Information Nominal Range at % of Reading Full Scale...

  • Page 94: Dynamic Characteristics

    NI 6115/6120 User Manual NI 6115...300 V/µs NI 6120...15 V/µs NI 6115...600 µV NI 6120...100 µV NI 6115...±30 mV for 1 µs NI 6120...±10 mV for 1 µs NI 6115...300 ns to 0.01% NI 6120...4 µs to ±1 LSB NI 6115...±35 µV/°C NI 6120...±35 µV/°C...
  • Page 95 Frequency scaler ... 10 MHz, 100 kHz A-15 Appendix A Specifications 0.0 V 0.8 V 2.0 V 5.0 V –320 µA — 10 µA — — 0.4 V 4.35 V — programmed I/O 1 frequency scaler NI 6115/6120 User Manual...
  • Page 96 Min gate pulse duration ...10 ns, edge-detect mode Data transfers ...DMA, interrupts, DMA modes ...Scatter-gather Triggers Analog Trigger NI 6115/6120 source ...All analog input channels, Level ...± full-scale, internal; Slope ...Positive or negative Resolution Hysteresis...Programmable Bandwidth ...(–3 dB) 5 MHz internal/external...

  • Page 97: Bus Interface

    RTSI Trigger<6> is configured as the PXI Star Trigger for the NI PXI-6115/6120. Refer to the Chapter 3, Hardware Overview, for more information. © National Instruments Corporation NI 6115 ... 2.2 A NI 6120 ... 3.0 A NI PCI-6115/6120... 31.2 by 10.6 cm NI PXI-6115/6120 ... 16 by 10 cm A-17...

  • Page 98: Electromagnetic Compatibility

    Maximum altitude...2,000 meters Pollution Degree (indoor use only) ...2 Safety The NI 6115/6120 was evaluated using the criteria of EN 61010-1 a-2:1995 and meets the requirements of the following standards for safety and electrical equipment for measurement, control and laboratory use: •...

  • Page 99: General Information

    What is the DAQ-STC? The DAQ-STC is the system timing control application-specific integrated circuit (ASIC) designed by NI and is the backbone of the NI 6115/6120 device. The DAQ-STC contains seven 24-bit counters and three 16-bit counters. The counters are divided into the following three groups: •...

  • Page 100: Installing And Configuring The Device

    Common Questions What type of 5 V protection does the NI 6115/6120 have? The NI 6115/6120 has 5 V lines equipped with a self-resetting 1 A fuse. How do I use the NI 6115/6120 with the NI-DAQ C API? The NI-DAQ User Manual for PC Compatibles describes the general programming flow when using the NI-DAQ C API as well as contains example code.

  • Page 101: Analog Input And Output

    Input»AI Parameter.vi from the function palette to set the filter values of 50 kHz and 500 kHz for the NI 6115, or to enable the 100 kHz filter for the NI 6120, on a per channel basis. To disable the filter, set the filter value to In NI-DAQ, use the value.
  • Page 102 Can I synchronize a one-channel AI data acquisition with a one-channel AO waveform generation on the NI 6115/6120? Yes. One way to accomplish synchronization is to use the waveform generation timing pulses to control the AI data acquisition. To do this, follow steps 1 through 4 below, in addition to the usual steps for data acquisition and waveform generation configuration.
  • Page 103 NI 6115/6120. If I’m using one of the general-purpose counter/timers on the NI 6115/6120, but I do not see the counter/timer output on the I/O connector, what am I doing wrong? If you are using NI-DAQ or LabWindows/CVI, you must configure the output line to output the signal to the I/O connector.
  • Page 104 Table 4-5 shows that there is a 50 kΩ pull-up resistor. This pull-up resistor sets the DIO(0) pin to a logic high when the output is in a high-impedance state. NI 6115/6120 User Manual LabVIEW Route Signal —...

  • Page 105: Technical Support And Professional Services

    To learn more, call your local NI office or visit ni.com/alliance and could not find the answers you need, contact ni.com ni.com/niglobal for technical ni.com . These ni.com/support for self-paced tutorials, videos, and to access the branch NI 6115/6120 User Manual...
  • Page 106 ± plus or minus positive of, or plus – negative of, or minus Ω square root of +5 V +5 VDC source signal © National Instruments Corporation Value –12 –9 – 6 –3 NI 6115/6120 User Manual...
  • Page 107 Bessel filters reduce nonlinear phase distortion inherent in all IIR filters. bipolar a signal range that includes both positive and negative values NI 6115/6120 User Manual ni.com...
  • Page 108 (2) collecting and measuring the same kinds of electrical signals with A/D and/or DIO devices plugged into a computer, and possibly generating control signals with D/A and/or DIO devices in the same computer © National Instruments Corporation Glossary NI 6115/6120 User Manual...
  • Page 109 1 LSB digital output EEPROM electrically erasable programmable read-only memory—ROM that can be erased with an electrical signal and reprogrammed ENOB effective number of bits NI 6115/6120 User Manual ni.com...
  • Page 110 0 clock source signal GPCTR0_UP_DOWN general-purpose counter 0 up down signal GPCTR1_GATE general-purpose counter 1 gate signal GPCTR1_OUT general-purpose counter 1 output signal GPCTR1_SOURCE general-purpose counter 1 clock source signal © National Instruments Corporation Glossary NI 6115/6120 User Manual...
  • Page 111 A/D or D/A transfer characteristic of the analog I/O circuitry current, output high current, output low interrupt request kilohertz NI 6115/6120 User Manual ni.com...
  • Page 112 © National Instruments Corporation Glossary NI 6115/6120 User Manual...
  • Page 113 Glossary not connected (signal) National Instruments NI-DAQ National Instruments driver software for DAQ hardware noise an undesirable electrical signal from external sources such as the AC power line, motors, generators, transformers, fluorescent lights, soldering irons, CRT displays, computers, electrical storms, welders, radio transmitters, and internal sources such as semiconductors, resistors, and capacitors;...
  • Page 114 © National Instruments Corporation Glossary NI 6115/6120 User Manual...
  • Page 115 RTSI bus real-time system integration bus—the National Instruments timing bus that connects DAQ devices directly, by means of connectors on top of the devices for precise synchronization of functions RTSI_OSC RTSI Oscillator—RTSI bus master clock...
  • Page 116 TRIG trigger signal source clock period source pulse width transistor-transistor logic pulse width update interval UISOURCE update interval counter clock signal UPDATE* update signal © National Instruments Corporation G-11 Glossary NI 6115/6120 User Manual...
  • Page 117 WFTRIG waveform generation trigger signal NI 6115/6120 User Manual G-12 ni.com...
  • Page 118 3-5, 3-6, 3-7, 3-8 inside-region analog triggering mode (figure), 3-7 low-hysteresis analog triggering mode (figure), 3-8 lowValue, 3-5, 3-6, 3-7, 3-8 overview, 3-5 specifications, A-16 antialiasing filters description, 3-8 effects of hardware and software filtering (figure), 3-9 enabling, B-3 NI 6115/6120 User Manual...
  • Page 119 Index AOGND signal analog output signal connections, 4-14 description (table), 4-3 avoiding false triggering (note), 3-6 base address for NI 6115/6120 device, B-2 below-low-level analog triggering mode, 3-6 bipolar input, 3-3 block diagrams analog trigger, 3-6 NI 6115 block diagram, 3-1...
  • Page 120 National Instruments documentation, xii online library, C-1 related documentation, xiii drivers instrument, C-1 software, C-1 EEPROM storage of calibration constants, 5-1 electromagnetic compatibility specifications, A-18 environmental noise, avoiding, 4-39 environmental specifications, A-17 Index NI 6115/6120 User Manual...
  • Page 121 1-3 glitches, questions about, B-4 GPCTR0_GATE signal See also PFI9/GPCTR0_GATE signal general-purpose counter timing summary (figure), 4-37 NI 6115/6120 User Manual general-purpose timing connections, 4-33 RTSI bus signal connections (figure), 3-13 GPCTR0_OUT signal description (table), 4-5 general-purpose counter timing summary...
  • Page 122 3-5 analog trigger block diagram, 3-6 overview, 3-5 antialiasing filters, 3-8 block diagrams NI 6115 block diagram, 3-1 NI 6120 block diagram, 3-2 correlated digital I/O, 3-10 phase-locked loop circuit, 3-9 timing signal routing clocks, 3-12 overview, 3-10...
  • Page 123 C-1 technical support, C-1 worldwide offices, C-1 NI 6115/6120 device See also hardware overview block diagrams NI 6115 block diagram, 3-1 NI 6120 block diagram, 3-2 configuration, 2-3 custom cabling, 1-6 optional equipment, 1-6 overview, 1-1 questions about...
  • Page 124 B-1 minimum, B-3 scan counter typical posttriggered acquisition (figure), 4-21 typical pretriggered acquisition, 4-21 SCANCLK signal description (table), 4-3 signal summary (table), 4-6 timing connections, 4-28 self-calibration, 5-2 self-resetting fuse, 4-18, B-2 Index NI 6115/6120 User Manual...
  • Page 125 GPCTR1_GATE signal, 4-36 GPCTR1_OUT signal, 4-36 GPCTR1_SOURCE signal, 4-35 GPCTR1_UP_DOWN signal, 4-37 I/O connectors exceeding maximum ratings (caution), 4-1 NI 6115/6120 User Manual overview, 4-1 signal descriptions (table), 4-3 power connections, 4-18 programmable function input connections, 4-20 timing connections data acquisition timing...
  • Page 126 UISOURCE signal, 4-31 UPDATE* signal, 4-30 WFTRIG signal, 4-29 timing I/O questions about, B-5 specifications, A-15 timing signal routing clocks, 3-12 programmable function inputs, 3-12 RTSI triggers, 3-12 STARTSCAN* signal routing (figure), 3-11 training customer, C-1 Index NI 6115/6120 User Manual...
  • Page 127 A-17 questions about, B-5 troubleshooting resources, C-1 UISOURCE signal, 4-31 RTSI bus signal connections (figure), 3-13 unpacking NI 6115/6120, 1-7 UPDATE* signal See also PFI5/UPDATE* signal input timing (figure), 4-31 output timing (figure), 4-31 RTSI bus signal connections...

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